Keyword : shift registers

On Transformation between Discretized Bernoulli and Tent Maps
Daisaburo YOSHIOKA Akio TSUNEDA Takahiro INOUE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/10/01
Vol. E88-A  No. 10 ; pp. 2678-2683
Type of Manuscript:  Special Section PAPER (Special Section on Nonlinear Theory and its Applications)
Category: 
Keyword: 
discretization, chaos map, shift registers, topological conjugacy, 
 Summary | Full Text:PDF(278.4KB)
On the n-th Order Shift Register Based Discrete Logarithm
Chik-How TAN Xun YI Chee-Kheong SIEW 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/05/01
Vol. E86-A  No. 5 ; pp. 1213-1216
Type of Manuscript:  Special Section LETTER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
cryptography, shift registers, discrete logarithm, 
 Summary | Full Text:PDF(148.1KB)
New Signature Schemes Based on 3rd Order Shift Registers
Chik-How TAN Xun YI Chee-Kheong SIEW 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/01/01
Vol. E85-A  No. 1 ; pp. 102-109
Type of Manuscript:  Special Section PAPER (Special Section on Cryptography and Information Security)
Category: 
Keyword: 
cryptography, digital signature, shift registers, discrete logarithm, 
 Summary | Full Text:PDF(234.6KB)
Test Structure for Characterizing Capacitance Matrix of Multi-Layer Interconnects in VLSI
Tetsuhisa MIDO Hiroshi ITO Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/04/25
Vol. E82-C  No. 4 ; pp. 570-575
Type of Manuscript:  Special Section PAPER (Special Issue on Microelectronic Test Structures)
Category: 
Keyword: 
test structure, capacitance matrix, VLSI interconnection, shift registers, non-overlap clock signal, sub-femto-farad measurement, 
 Summary | Full Text:PDF(651.6KB)