Keyword : self-checking circuits

A Design Method of SFS and SCD Combinational Circuits
Shin'ichi HATAKENAKA Takashi NANYA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1992/11/25
Vol. E75-D  No. 6 ; pp. 819-823
Type of Manuscript:  Special Section PAPER (Special Issue on Pacific Rim International Symposium on Fault Tolerant Systems)
self-checking circuitsstrongly fault-securestrongly code-disjointcombinational circuitsconcurrent error detection
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