Keyword : selective-MT

Delay Modeling and Critical-Path Delay Calculation for MTCMOS Circuits
Naoaki OHKUBO Kimiyoshi USAMI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/12/01
Vol. E89-A  No. 12 ; pp. 3482-3490
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Simulation and Verification
MTCMOSselective-MTstatic timing analysisleakage powerdelay modeling
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