Keyword : routability


Timing-Driven Global Routing with Efficient Buffer Insertion
Jingyu XU Xianlong HONG Tong JING 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/11/01
Vol. E88-A  No. 11 ; pp. 3188-3195
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
VLSI layoutglobal routingtiming-drivenbuffer insertionroutability
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A Routability Driven Technology Mapping Algorithm for LUT Based FPGA Designs
Chi-Chou KAO Yen-Tai LAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/11/01
Vol. E84-A  No. 11 ; pp. 2690-2696
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: FPGA Systhesis
Keyword: 
technology mappingroutabilitymin-cutfield programmable gate array (FPGA)
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An Efficient Routing Algorithm for Symmetrical FPGAs Using Reliable Cost Metrics
Nak-Woong EUM Inhag PARK Chong-Min KYUNG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/03/01
Vol. E84-A  No. 3 ; pp. 829-838
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
FPGAroutingroutabilitydelay
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Routability of FPGAs with Extremal Switch-Block Structures
Yasuhiro TAKASHIMA Atsushi TAKAHASHI Yoji KAJITANI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/05/25
Vol. E81-A  No. 5 ; pp. 850-856
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
FPGAswitch-blockroutabilitydetailed-routing
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Efficient Routability Checking for Global Wires in Planar Layouts
Naoyuki ISO Yasushi KAWAGUCHI Tomio HIRATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/10/25
Vol. E80-A  No. 10 ; pp. 1878-1882
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
layout designroutabilityrouting
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Routability Analysis of Bit-Serial Pipeline Datapaths
Tsuyoshi ISSHIKI Wayne Wei-Ming DAI Hiroaki KUNIEDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/10/25
Vol. E80-A  No. 10 ; pp. 1861-1870
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
bit-serial pipelineRent's ruleroutabilityFPGA
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