Keyword : reorder buffer


An Energy Efficient Instruction Window for Scalable Processor Architecture
Min CHOI Seungryoul MAENG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/09/01
Vol. E91-C  No. 9 ; pp. 1427-1436
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Processors Based on Novel Concepts in Computation)
Category: 
Keyword: 
instruction windowsuperscalarlow-power microarchitecturereorder bufferissue queue
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Reorder Buffer Structure with Shelter Buffer for Out-of-Order Issue Superscalar Processors
Mun-Suek CHANG Choung-Shik PARK Sang-Bang CHOI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/06/25
Vol. E83-A  No. 6 ; pp. 1091-1099
Type of Manuscript:  Special Section PAPER (Special Section of Papers Selected from 1999 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC'99))
Category: 
Keyword: 
superscalar processorout-of-order issuereorder bufferstagnationshelter buffer
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System Performance Analyses of Out-of-Order Superscalar Processors Using Analytical Method
Hak-Jun KIM Sun-Mo KIM Sang-Bang CHOI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/06/25
Vol. E82-A  No. 6 ; pp. 927-938
Type of Manuscript:  Special Section PAPER (Special Section of Papers Selected from 1998 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '98))
Category: 
Keyword: 
superscalar processorinstruction-level parallelismin-order issueout-of-order issueinstruction windowreorder bufferqueuing model
 Summary | Full Text:PDF