Keyword : redundant faults

Synthesis for Testability of Synchronous Sequential Circuits with Strong-Connectivity Using Undefined States on State Transition Graph
Soo-Hyun KIM Ho-Yong CHOI Kiseon KIM Dong-Ik LEE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/12/01
Vol. E87-A  No. 12 ; pp. 3216-3223
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Test
Keyword: 
synthesis for testability, undefined states, redundant faults, 
 Summary | Full Text:PDF
Efficient Test Generation Using Redundancy Identification
Sangyoon HAN Sungho KANG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2000/09/25
Vol. E83-D  No. 9 ; pp. 1814-1815
Type of Manuscript:  LETTER
Category: Fault Tolerance
Keyword: 
test pattern generation, redundant faults, 
 Summary | Full Text:PDF
A Study for Testability of Redundant Faults in Combinational Circuits Using Delay Effects
Xiangqiu YU Hiroshi TAKAHASHI Yuzo TAKAMATSU 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1995/07/25
Vol. E78-D  No. 7 ; pp. 822-829
Type of Manuscript:  Special Section PAPER (Special Issue on Verification, Test and Diagnosis of VLSI Systems)
Category: 
Keyword: 
test generation, combinational circuits, redundant faults, delay effect, extended seven-valued calculus, 
 Summary | Full Text:PDF