Keyword : reconfigurable computing


An Implementation of Multiple-Standard Video Decoder on a Mixed-Grained Reconfigurable Computing Platform
Leibo LIU Dong WANG Yingjie CHEN Min ZHU Shouyi YIN Shaojun WEI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2016/05/01
Vol. E99-D  No. 5 ; pp. 1285-1295
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
algorithm mappingcoarse-grained reconfigurable arrayfield-programmable gate arrayreconfigurable computingvideo decoding
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Novel Reconfigurable Hardware Accelerator for Protein Sequence Alignment Using Smith-Waterman Algorithm
Atef IBRAHIM Hamed ELSIMARY Abdullah ALJUMAH 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/03/01
Vol. E99-A  No. 3 ; pp. 683-690
Type of Manuscript:  PAPER
Category: Digital Signal Processing
Keyword: 
semi-systolic arraysbio-informaticsprotein sequence alignmentSmith-Waterman alignment algorithmbiological computationreconfigurable computing
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Battery-Aware Loop Nests Mapping for CGRAs
Yu PENG Shouyi YIN Leibo LIU Shaojun WEI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2015/02/01
Vol. E98-D  No. 2 ; pp. 230-242
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Architecture
Keyword: 
reconfigurable computingloop nestspolyhedral modelenergy consumptiondischarge duration
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Battery-Aware Task Mapping for Coarse-Grained Reconfigurable Architecture
Shouyi YIN Rui SHI Leibo LIU Shaojun WEI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/12/01
Vol. E96-D  No. 12 ; pp. 2524-2535
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: 
Keyword: 
reconfigurable computingenergy consumptiontask mappingbattery nonlinear effect
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Affine Transformations for Communication and Reconfiguration Optimization of Mapping Loop Nests on CGRAs
Shouyi YIN Dajiang LIU Leibo LIU Shaojun WEI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/08/01
Vol. E96-D  No. 8 ; pp. 1582-1591
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Design Methodology
Keyword: 
reconfigurable computingloop transformationpolyhedra modelcompiling
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High-Speed Fully-Adaptable CRC Accelerators
Amila AKAGIC Hideharu AMANO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/06/01
Vol. E96-D  No. 6 ; pp. 1299-1308
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
reconfigurable computingFPGAscyclic redundancy checksadaptabilityaccelerators
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Hardware Software Co-design of H.264 Baseline Encoder on Coarse-Grained Dynamically Reconfigurable Computing System-on-Chip
Hung K. NGUYEN Peng CAO Xue-Xiang WANG Jun YANG Longxing SHI Min ZHU Leibo LIU Shaojun WEI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/03/01
Vol. E96-D  No. 3 ; pp. 601-615
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
reconfigurable computingreconfigurable multimedia systemREMUS-IIcoarse-grained dynamically reconfigurable architectureH.264/AVC encoder
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Mapping Optimization of Affine Loop Nests for Reconfigurable Computing Architecture
Dajiang LIU Shouyi YIN Chongyong YIN Leibo LIU Shaojun WEI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/12/01
Vol. E95-D  No. 12 ; pp. 2898-2907
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: Computer Architecture
Keyword: 
reconfigurable computingaffine looppolyhedron modelparallel computing
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Configuration Context Reduction for Coarse-Grained Reconfigurable Architecture
Shouyi YIN Chongyong YIN Leibo LIU Min ZHU Shaojun WEI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/02/01
Vol. E95-D  No. 2 ; pp. 335-344
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Design Methodology
Keyword: 
reconfigurable computingcoarse-grained reconfigurable architecture (CGRA)configuration contextstructure-correlation elimination
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Optimisations Techniques for the Automatic ISA Customisation Algorithm
Antoine TROUVE Kazuaki MURAKAMI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/02/01
Vol. E95-D  No. 2 ; pp. 437-440
Type of Manuscript:  Special Section LETTER (Special Section on Reconfigurable Systems)
Category: Design Optimisation
Keyword: 
reconfigurable computingcustom instruction generationoptimisation
 Summary | Full Text:PDF | Errata[Uploaded on February 1,2012]

Compiler Framework for Reconfigurable Computing Architecture
Chongyong YIN Shouyi YIN Leibo LIU Shaojun WEI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/10/01
Vol. E92-C  No. 10 ; pp. 1284-1290
Type of Manuscript:  BRIEF PAPER
Category: 
Keyword: 
reconfigurable computingdata-paralleltemplate extractiontemplate matching
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FPGA Implementation of Highly Modular Fast Universal Discrete Transforms
Panan POTIPANTONG Phaophak SIRISUK Soontorn ORAINTARA Apisak WORAPISHET 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/04/01
Vol. E92-C  No. 4 ; pp. 576-586
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
UDFHTDHTDSTDFTDCTFFTFPGAreconfigurable computing
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An Efficient and Effective Algorithm for Online Task Placement with I/O Communications in Partially Reconfigurable FPGAs
Mitsuru TOMONO Masaki NAKANISHI Shigeru YAMASHITA Kazuo NAKAJIMA Katsumasa WATANABE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/12/01
Vol. E89-A  No. 12 ; pp. 3416-3426
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: System Level Design
Keyword: 
algorithmonline placementpartially reconfigurable FPGAsreconfigurable computing
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Dynamically Reconfigurable Logic LSI--PCA-1: The First Realization of the Plastic Cell Architecture
Hideyuki ITO Ryusuke KONISHI Hiroshi NAKADA Kiyoshi OGURI Minoru INAMORI Akira NAGOYA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2003/05/01
Vol. E86-D  No. 5 ; pp. 859-867
Type of Manuscript:  Special Section PAPER (Special Issue on Reconfigurable Computing)
Category: 
Keyword: 
reconfigurable computingautonomous reconfigurabilityasynchronous circuit design
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Accelerating the CKY Parsing Using FPGAs
Jacir L. BORDIM Yasuaki ITO Koji NAKANO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2003/05/01
Vol. E86-D  No. 5 ; pp. 803-810
Type of Manuscript:  Special Section PAPER (Special Issue on Reconfigurable Computing)
Category: 
Keyword: 
CKY parsingFPGAsreconfigurable architecturesreconfigurable computing
 Summary | Full Text:PDF

Time-Memory Trade-off Cryptanalysis for Limited Key on FPGA-Based Parallel Machine RASH
Katsumi TAKAHASHI Hiroai ASAMI Katsuto NAKAJIMA Masahiro IIDA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2003/05/01
Vol. E86-D  No. 5 ; pp. 781-788
Type of Manuscript:  Special Section PAPER (Special Issue on Reconfigurable Computing)
Category: 
Keyword: 
RASHFPGAreconfigurable computingtime-memory trade-off cryptanalysis
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Configurable and Reconfigurable Computing for Digital Signal Processing
Toshinori SUEYOSHI Masahiro IIDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/03/01
Vol. E85-A  No. 3 ; pp. 591-599
Type of Manuscript:  INVITED PAPER (Special Section on the Trend of Digital Signal Processing and Its Future Direction)
Category: LSI/Signal Processors
Keyword: 
configurable computingreconfigurable computingdigital signal processingFPGA
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Plastic Cell Architecture: A Scalable Device Architecture for General-Purpose Reconfigurable Computing
Kouichi NAGAMI Kiyoshi OGURI Tsunemichi SHIOZAWA Hideyuki ITO Ryusuke KONISHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/09/25
Vol. E81-C  No. 9 ; pp. 1431-1437
Type of Manuscript:  Special Section PAPER (Special Issue on Novel VLSI Processor Architectures)
Category: 
Keyword: 
reconfigurable computingFPGAsobject-orientedhardware description languagecellular automata
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