Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 1998/07/25
Vol. E81-D
No. 7 ;
pp. 660-667
Type of Manuscript:
Special Section PAPER (Special Issue on Test and Diagnosis of VLSI)
Category: Design for Testability Keyword: design for testability, partial scan design method, n-fold line-up structure, pure load/hold FF, |