Keyword : programmable logic array


Design of Multiple-Valued Programmable Logic Array with Unary Function Generators
Yutaka HATA Naotake KAMIURA Kazuharu YAMATO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1999/09/25
Vol. E82-D  No. 9 ; pp. 1254-1260
Type of Manuscript:  PAPER
Category: Computer Hardware and Design
Keyword: 
multiple-valued logicprogrammable logic arrayunary functionlogic designminimization
 Summary | Full Text:PDF(1.1MB)

A Fault Model for Multiple-Valued PLA's and Its Equivalences
Yasunori NAGATA Masao MUKAIDONO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1994/09/25
Vol. E77-A  No. 9 ; pp. 1527-1534
Type of Manuscript:  PAPER
Category: Computer Aided Design (CAD)
Keyword: 
equivalences of faultsfault modelmultiple-valued logicprogrammable logic arraytest compaction
 Summary | Full Text:PDF(551KB)