| Keyword : processor architecture
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Reducing Cache Energy Dissipation by Using Dual Voltage Supply Vasily G. MOSHNYAGA Hiroshi TSUJI | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/11/01
Vol. E84-A
No. 11 ;
pp. 2762-2768
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Optimization of Power and Timing Keyword: cache, processor architecture, low-power, | | Summary | Full Text:PDF | |
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