Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/12/01
Vol. E90-A
No. 12 ;
pp. 2661-2668
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Design
Keyword:
timing analysis, power supply noise, gate delay model, power/ground level variation, |
