Keyword : power switch

Design and Performance of a Sub-Nano-Ampere Two-Stage Power Management Circuit in 0.35-µm CMOS for Dust-Size Sensor Nodes
Mamoru UGAJIN Toshishige SHIMAMURA Shin'ichiro MUTOH Mitsuru HARADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/07/01
Vol. E94-C  No. 7 ; pp. 1206-1211
Type of Manuscript:  PAPER
Category: Electronic Circuits
sensor nodepower managementpower switchenergy harvestingCMOS
 Summary | Full Text:PDF

CKVdd: A Clock-Controlled Self-Stabilized Voltage Technique for Reducing Dynamic Power in CMOS Digital Circuits
Ching-Hwa CHENG Chin-Hsien WANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/04/01
Vol. E92-C  No. 4 ; pp. 391-400
Type of Manuscript:  Special Section PAPER (Special Section on Low-Leakage, Low-Voltage, Low-Power and High-Speed Technologies for System LSIs in Deep-Submicron Era)
dynamic power reductionramp voltagepower switch
 Summary | Full Text:PDF