Keyword : power supply noise


Forward Wave Analysis of PCB Power Supply Planes above 1GHz
Umberto PAOLETTI Yasumaro KOMIYA Takashi SUGA Hideki OSAKA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2015/07/01
Vol. E98-B  No. 7 ; pp. 1196-1203
Type of Manuscript:  Special Section PAPER (Special Section on Electromagnetic Compatibility Technology in Conjunction with Main Topics of EMC'14/Tokyo)
Category: 
Keyword: 
EMCPCBpower supply noisesimultaneous switching noise
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AC Power Supply Noise Simulation of CMOS Microprocessor with LSI Chip-Package-Board Integrated Model
Kumpei YOSHIKAWA Kouji ICHIKAWA Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2014/04/01
Vol. E97-C  No. 4 ; pp. 264-271
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design,---,Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
power supply noiseelectromagnetic compatibilityLSI chip-package-board co-designpower integrity
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Performance Evaluation of Probing Front-End Circuits for On-Chip Noise Monitoring
Yuuki ARAGA Nao UEDA Yasumasa TAKAGI Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/12/01
Vol. E96-A  No. 12 ; pp. 2516-2523
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Device and Circuit Modeling and Analysis
Keyword: 
behavioral modelingwaveform data acquisitionpower supply noisesubstrate noisediagnosis of VLSI circuits
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Design of Effective Supply Voltage Monitor for Measuring Power Rails of Integrated Circuits
Takeshi OKUMOTO Kumpei YOSHIKAWA Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/04/01
Vol. E96-C  No. 4 ; pp. 538-545
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
noise detection circuitpower supply noisepower supply integritysystems-on-a-chip
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Co-simulation of On-Chip and On-Board AC Power Noise of CMOS Digital Circuits
Kumpei YOSHIKAWA Yuta SASAKI Kouji ICHIKAWA Yoshiyuki SAITO Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/12/01
Vol. E95-A  No. 12 ; pp. 2284-2291
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Device and Circuit Modeling and Analysis
Keyword: 
LSI chip-package-board co-designelectromagnetic compatibilitypower supply noisepower delivery network
 Summary | Full Text:PDF

Greedy Algorithm for the On-Chip Decoupling Capacitance Optimization to Satisfy the Voltage Drop Constraint
Mikiko SODE TANAKA Nozomu TOGAWA Masao YANAGISAWA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/12/01
Vol. E94-A  No. 12 ; pp. 2482-2489
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Level Design
Keyword: 
power supply noisepower distribution networksignal integritycircuit simulation
 Summary | Full Text:PDF

Setup Time, Hold Time and Clock-to-Q Delay Computation under Dynamic Supply Noise
Takaaki OKUMURA Masanori HASHIMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/10/01
Vol. E94-A  No. 10 ; pp. 1948-1953
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
power supply noiseFlip-Flopsetup timehold timetiming analysis
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On-Chip Resonant Supply Noise Canceller Utilizing Parasitic Capacitance of Sleep Blocks for Power Mode Switch
Jinmyoung KIM Toru NAKURA Hidehiro TAKATA Koichiro ISHIBASHI Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4 ; pp. 511-519
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
power supply noiseresonanceparasitic capacitancesleep blockDVSpower gating
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Greedy Optimization Algorithm for the Power/Ground Network Design to Satisfy the Voltage Drop Constraint
Mikiko SODE TANAKA Nozomu TOGAWA Masao YANAGISAWA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/04/01
Vol. E94-A  No. 4 ; pp. 1082-1090
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
power supply noisepower distribution networkssignal integritycircuit simulation
 Summary | Full Text:PDF

A Continuous-Time Waveform Monitoring Technique for On-Chip Power Noise Measurements in VLSI Circuits
Yoji BANDO Satoshi TAKAYA Toru OHKAWA Toshiharu TAKARAMOTO Toshio YAMADA Masaaki SOUDA Shigetaka KUMASHIRO Tohru MOGAMI Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4 ; pp. 495-503
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
on-chip monitorpower supply noise
 Summary | Full Text:PDF

Gate Delay Estimation in STA under Dynamic Power Supply Noise
Takaaki OKUMURA Fumihiro MINAMI Kenji SHIMAZAKI Kimihiko KUWADA Masanori HASHIMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A  No. 12 ; pp. 2447-2455
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Device and Circuit Modeling and Analysis
Keyword: 
power supply noisegate delaytiming analysis
 Summary | Full Text:PDF

Statistical Timing Analysis Considering Clock Jitter and Skew due to Power Supply Noise and Process Variation
Takashi ENAMI Shinyu NINOMIYA Ken-ichi SHINKAI Shinya ABE Masanori HASHIMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A  No. 12 ; pp. 2399-2408
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Device and Circuit Modeling and Analysis
Keyword: 
statistical timing analysisclock jittersetup verificationstructural correlationpower supply noise
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An Arbitrary Digital Power Noise Generator Using 65 nm CMOS Technology
Tetsuro MATSUNO Daisuke FUJIMOTO Daisuke KOSAKA Naoyuki HAMANISHI Ken TANABE Masazumi SHIOCHI Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/06/01
Vol. E93-C  No. 6 ; pp. 820-826
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
noise emulationsubstrate noisepower supply noisesignal integritysubstrate couplingpower integrity
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Full Chip Circuit/Substrate Macro Modeling Method Which Controls the Analysis Accuracy and CPU Time by Using Current Density
Mikiko Sode TANAKA Mikihiro KAJITA Naoya NAKAYAMA Satoshi NAKAMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/02/01
Vol. E93-A  No. 2 ; pp. 448-455
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
substrate noisepower supply noisesubstrate modelingclock jitterhigh speed
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Modeling of Power Noise Generation in Standard-Cell Based CMOS Digital Circuits
Tetsuro MATSUNO Daisuke KOSAKA Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/02/01
Vol. E93-A  No. 2 ; pp. 440-447
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
substrate noisepower supply noisesignal integritysubstrate couplingpower integrity
 Summary | Full Text:PDF

High Launch Switching Activity Reduction in At-Speed Scan Testing Using CTX: A Clock-Gating-Based Test Relaxation and X-Filling Scheme
Kohei MIYASE Xiaoqing WEN Hiroshi FURUKAWA Yuta YAMATO Seiji KAJIHARA Patrick GIRARD Laung-Terng WANG Mohammad TEHRANIPOOR 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/01/01
Vol. E93-D  No. 1 ; pp. 2-9
Type of Manuscript:  Special Section PAPER (Special Section on Test, Diagnosis and Verification of SOCs)
Category: 
Keyword: 
power supply noisetest relaxationX-fillingclock-gatingtest compaction
 Summary | Full Text:PDF

Analysis of Jitter in CMOS Ring Oscillators due to Power Supply Noise
Xiaoying DENG Xin CHEN Jun YANG Jianhui WU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/07/01
Vol. E92-C  No. 7 ; pp. 973-975
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
power supply noisering oscillatorjitter
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An Efficient Decoupling Capacitance Budgeting Methodology by Using Power-Capacitance Ratio
Susumu KOBAYASHI Naoshi DOI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/04/01
Vol. E92-C  No. 4 ; pp. 492-499
Type of Manuscript:  Special Section PAPER (Special Section on Low-Leakage, Low-Voltage, Low-Power and High-Speed Technologies for System LSIs in Deep-Submicron Era)
Category: 
Keyword: 
decoupling capacitancepower supply noisepower dissipationlayout designsimulation
 Summary | Full Text:PDF

Timing Analysis Considering Spatial Power/Ground Level Variation
Masanori HASHIMOTO Junji YAMAGUCHI Hidetoshi ONODERA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/12/01
Vol. E90-A  No. 12 ; pp. 2661-2668
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Design
Keyword: 
timing analysispower supply noisegate delay modelpower/ground level variation
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Fast Methods to Estimate Clock Jitter due to Power Supply Noise
Koutaro HACHIYA Takayuki OHSHIMA Hidenari NAKASHIMA Masaaki SODA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/04/01
Vol. E90-A  No. 4 ; pp. 741-747
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
clock jitterpower supply noiseclock distribution networkpower distribution network
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Noise Immunity Investigation of Low Power Design Schemes
Mohamed ABBAS Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/08/01
Vol. E89-C  No. 8 ; pp. 1238-1247
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
noise immunitylow powerpower supply noisedigital design
 Summary | Full Text:PDF

Effects of On-Chip Inductance on Power Distribution Grid
Atsushi MURAMATSU Masanori HASHIMOTO Hidetoshi ONODERA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A  No. 12 ; pp. 3564-3572
Type of Manuscript:  Special Section LETTER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
power distribution networkon-chip inductancepower supply noisedecoupling capacitance
 Summary | Full Text:PDF

Preliminary Experiments for Power Supply Noise Reduction Using On-Board Stubs
Toru NAKURA Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/08/01
Vol. E88-C  No. 8 ; pp. 1734-1739
Type of Manuscript:  Special Section PAPER (Special Section on Papers Selected from AP-ASIC 2004)
Category: 
Keyword: 
stubon-boardpower supply noisedi/dt noisePRBS pattern
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On-Chip di/dt Detector Circuit
Toru NAKURA Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/05/01
Vol. E88-C  No. 5 ; pp. 782-787
Type of Manuscript:  Special Section PAPER (Special Section on Microelectronic Test Structures)
Category: 
Keyword: 
di/dt detectormutual inductorspiral inductorparasitic inductancepower supply noise
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Stub vs. Capacitor for Power Supply Noise Reduction
Toru NAKURA Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/01/01
Vol. E88-C  No. 1 ; pp. 125-132
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
stubdecoupling capacitorpower supply noisedi/dt noiseIR drop
 Summary | Full Text:PDF