IEICE Trans

Keyword : phase locked loop

A 65 nm 19.1-to-20.4 GHz Sigma-Delta Fractional-N Frequency Synthesizer with Two-Point Modulation for FMCW Radar Applications Yuanyuan XU Wei LI Wei WANG Dan WU Lai HE Jintao HU
Publication: Publication Date: 2019/01/01 Vol. E102-C No. 1 ; pp. 64-76 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: CMOS, FMCW radar, fractional-N, phase locked loop, frequency synthesizer, two-point modulation,
	Summary \| Full Text:PDF(2MB)

Phase Locking and Frequency Tuning of Resonant-Tunneling-Diode Terahertz Oscillators Kota OGINO Safumi SUZUKI Masahiro ASADA
Publication: Publication Date: 2018/03/01 Vol. E101-C No. 3 ; pp. 183-185 Type of Manuscript: BRIEF PAPER Category: Semiconductor Materials and Devices Keyword: terahertz oscillator, resonant tunneling diode, frequency tuning, phase locked loop,
	Summary \| Full Text:PDF(617.1KB)

Experimental Study on a 5.8 GHz Power-Variable Phase-Controlled Magnetron Bo YANG Tomohiko MITANI Naoki SHINOHARA
Publication: Publication Date: 2017/10/01 Vol. E100-C No. 10 ; pp. 901-907 Type of Manuscript: Special Section PAPER (Special Section on Microwave and Millimeter-Wave Technology) Category: Keyword: 5.8 GHz magnetron, phase locked loop, wireless power transfer, phased array,
	Summary \| Full Text:PDF(2MB)

An Improved Triple-Tunable Millimeter-Wave Frequency Synthesizer with High Performance Yuanwang YANG Jingye CAI Haiyan JIN
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/11/01 Vol. E94-C No. 11 ; pp. 1802-1806 Type of Manuscript: BRIEF PAPER Category: Electronic Circuits Keyword: direct digital synthesizer, phase locked loop, spurious component, multiple-tune,
	Summary \| Full Text:PDF(784.4KB)

Automatic Adjustment of Phase Locked Loop Transfer Function Masahiro YOSHIOKA Nobuo FUJII
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/02/01 Vol. E91-A No. 2 ; pp. 483-490 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: phase locked loop, gain adjustment, frequency adjustment, automatic calibration,
	Summary \| Full Text:PDF(772KB)

A Study on Fully Digital Clock Data Recovery Utilizing Time to Digital Converter Philipus Chandra OH Akira MATSUZAWA Win CHAIVIPAS
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2007/06/01 Vol. E90-C No. 6 ; pp. 1311-1314 Type of Manuscript: Special Section LETTER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: clock data recovery, time to digital converter, phase locked loop,
	Summary \| Full Text:PDF(316.8KB)

An Ultra-Wide Range Digitally Adaptive Control Phase Locked Loop with New 3-Phase Switched Capacitor Loop Filter Shiro DOSHO Naoshi YANAGISAWA Kazuaki SOGAWA Yuji YAMADA Takashi MORIE
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2007/06/01 Vol. E90-C No. 6 ; pp. 1197-1202 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: loop filter, switched capacitor, phase locked loop, digital control, adaptive control,
	Summary \| Full Text:PDF(2.7MB)

An 8-GS/s 4-Bit 340 mW CMOS Time Interleaved Flash Analog-to-Digital Converter Young-Chan JANG Sang-Hune PARK Seung-Chan HEO Hong-June PARK
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/02/01 Vol. E87-A No. 2 ; pp. 350-356 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: analog-to-digital converter, time interleaved flash converter, resistor averaging, distributed track-and-hold, phase locked loop,
	Summary \| Full Text:PDF(595.3KB)

A Giga-b/s CMOS Clock and Data Recovery Circuit with a Novel Adaptive Phase Detector Jae-Wook LEE Cheon-O LEE Woo-Young CHOI
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2003/07/01 Vol. E86-B No. 7 ; pp. 2186-2189 Type of Manuscript: LETTER Category: Communication Devices/Circuits Keyword: clock and data recovery, phase detector, phase locked loop,
	Summary \| Full Text:PDF(532.5KB)

Low Spurious Frequency Setting Algorithm for a Triple Tuned Type PLL Synthesizer Driven by a DDS Ken'ichi TAJIMA Yoshihiko IMAI Yousuke KANAGAWA Kenji ITOH Yoji ISOTA Osami ISHIDA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2002/03/01 Vol. E85-C No. 3 ; pp. 595-598 Type of Manuscript: Special Section LETTER (Special Issue on Signals, Systems and Electronics Technology) Category: Keyword: direct digital synthesizer, phase locked loop, spurious component, triple tune,
	Summary \| Full Text:PDF(405.5KB)

Phase Tracking System for Ultra Narrow Bandwidth Applications Martin T. HILL Antonio CANTONI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2002/03/01 Vol. E85-C No. 3 ; pp. 558-565 Type of Manuscript: Special Section PAPER (Special Issue on Signals, Systems and Electronics Technology) Category: Circuit Keyword: phase locked loop, phase noise, frequency comparators, phase comparators, voltage controlled oscillator, bandwidth,
	Summary \| Full Text:PDF(525.7KB)

Selectivity on Synchronization and Pattern Formation in Coupled Phase Locked Loops Hisato FUJISAKA Masahiro SAKAMOTO Mititada MORISUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/09/01 Vol. E84-A No. 9 ; pp. 2213-2220 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Circuits & Systems Keyword: phase locked loop, synchronization, phase pattern,
	Summary \| Full Text:PDF(2MB)

Response of PLL Demodulator by Two Sinusoidal Inputs Takahiro OIE Tadamitsu IRITANI Hiroshi KAWAKAMI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1994/11/25 Vol. E77-A No. 11 ; pp. 1771-1776 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and Its Applications) Category: Analysis of Phase Locked Loops Keyword: phase locked loop, frequency shift keying, demodulation, frequency hopped spread spectrum,
	Summary \| Full Text:PDF(408KB)

An Experimental Full-CMOS Multigigahertz PLL LSI Using 0.4-µm Gate Ultrathin-Film SIMOX Technology Yuichi KADO Masao SUZUKI Keiichi KOIKE Yasuhisa OMURA Katsutoshi IZUMI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1993/04/25 Vol. E76-C No. 4 ; pp. 562-571 Type of Manuscript: Special Section PAPER (Special Issue on Sub-Half Micron Si Device and Process Technologies) Category: Device Technology Keyword: integrated electronics, semiconductor materials and devices, CMOS, SOI, SIMOX, phase locked loop,
	Summary \| Full Text:PDF(955.5KB)

3 V-Operation GaAs Prescaler IC with Power Saving Function Noriyuki HIRAKATA Mitsuaki FUJIHIRA Akihiro NAKAMURA Tomihiro SUZUKI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1992/10/25 Vol. E75-C No. 10 ; pp. 1115-1120 Type of Manuscript: Special Section PAPER (Special Issue on Compound Semiconductor Integrated Circuits) Category: Keyword: electronic circuits, prescaler, gallium arsenide, mobile communications, phase locked loop,
	Summary \| Full Text:PDF(555.8KB)