Keyword : phase interpolator


A Design of 0.7-V 400-MHz All-Digital Phase-Locked Loop for Implantable Biomedical Devices
Jungnam BAE Saichandrateja RADHAPURAM Ikkyun JO Weimin WANG Takao KIHARA Toshimasa MATSUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/04/01
Vol. E99-C  No. 4 ; pp. 431-439
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design---Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
all-digital phase-locked loopcontrollerdigitally-controlled oscillatorphase interpolatorCMOSMICS
 Summary | Full Text:PDF

A-104 dBc/Hz In-Band Phase Noise 3 GHz All Digital PLL with Phase Interpolation Based Hierarchical Time to Digital Converter
Daisuke MIYASHITA Hiroyuki KOBAYASHI Jun DEGUCHI Shouhei KOUSAI Mototsugu HAMADA Ryuichi FUJIMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/06/01
Vol. E95-C  No. 6 ; pp. 1008-1016
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
ADPLLTDCphase interpolatorphase noise
 Summary | Full Text:PDF

A New 1.25-Gb/s Burst Mode Clock and Data Recovery Circuit Using Two Digital Phase Aligners and a Phase Interpolator
Chang-Kyung SEONG Seung-Woo LEE Woo-Young CHOI 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2008/05/01
Vol. E91-B  No. 5 ; pp. 1397-1402
Type of Manuscript:  PAPER
Category: Devices/Circuits for Communications
Keyword: 
burst-modeclock and data recovery circuitdigital phase alignerphase interpolator
 Summary | Full Text:PDF

A 1.25-Gb/s Digitally-Controlled Dual-Loop Clock and Data Recovery Circuit with Enhanced Phase Resolution
Chang-Kyung SEONG Seung-Woo LEE Woo-Young CHOI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/01/01
Vol. E90-C  No. 1 ; pp. 165-170
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
dual-loop clock and data recovery (CDR)phase interpolatorphase resolution
 Summary | Full Text:PDF

A Spread Spectrum Clock Generator Using Digital Tracking Scheme
Takefumi YOSHIKAWA Tsuyoshi EBUCHI Yukio ARIMA Toru IWATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/06/01
Vol. E88-C  No. 6 ; pp. 1288-1289
Type of Manuscript:  Special Section LETTER (Special Section on Analog Circuit and Device Technologies)
Category: PLL
Keyword: 
PLLspread spectrum clockingEMIphase interpolator
 Summary | Full Text:PDF