Keyword : pass-transistor logic

A Novel and Very Fast 4-2 Compressor for High Speed Arithmetic Operations
Amir FATHI Sarkis AZIZIAN Khayrollah HADIDI Abdollah KHOEI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C  No. 4 ; pp. 710-712
Type of Manuscript:  BRIEF PAPER
Category: 
Keyword: 
compressor, low latency, pass-transistor logic, 
 Summary | Full Text:PDF
Boosted Voltage Scheme with Active Body-Biasing Control on PD-SOI for Ultra Low Voltage Operation
Masaaki IIJIMA Masayuki KITAMURA Masahiro NUMA Akira TADA Takashi IPPOSHI Shigeto MAEGAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C  No. 4 ; pp. 666-674
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Digital
Keyword: 
low power design, PD-SOI, body-bias, pass-transistor logic, circuit simulation, SRAM, 
 Summary | Full Text:PDF
A Sub-1 V Bootstrap Pass-Transistor Logic
Koji FUJII Takakuni DOUSEKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/04/01
Vol. E86-C  No. 4 ; pp. 604-611
Type of Manuscript:  Special Section PAPER (Special Issue on High-Performance, Low-Power System LSIs and Related Technologies)
Category: Circuit Design
Keyword: 
pass-transistor logic, bootstrap, low voltage, adder, 
 Summary | Full Text:PDF
An Algorithm for Generating Generic BDDs
Tetsushi KATAYAMA Hiroyuki OCHI Takao TSUDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/12/25
Vol. E83-A  No. 12 ; pp. 2505-2512
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis
Keyword: 
combinational synthesis, logic function, switching theory, binary decision diagram, pass-transistor logic, 
 Summary | Full Text:PDF
A New Description of MOS Circuits at Switch-Level with Applications
Massoud PEDRAM Xunwei WU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/10/25
Vol. E80-A  No. 10 ; pp. 1892-1901
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
MOS, LSI, pass-transistor logic, switching theory, low power design, 
 Summary | Full Text:PDF
Design of High-Speed High-Density Parallel Adders and Multipliers Using Regenerative Pass-Transistor Logic
Tsz-Shing CHEUNG Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/03/25
Vol. E80-C  No. 3 ; pp. 478-488
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
pass-transistor logic, carry skip method, booth multiplier, monte carlo method., 
 Summary | Full Text:PDF
Regenerative Pass-Transistor Logic: A Circuit Technique for High Speed Digital Design
Tsz Shing CHEUNG Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/09/25
Vol. E79-C  No. 9 ; pp. 1274-1284
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
pass-transistor logic, dual-rail logic, Monte Carlo method, logic gates, arithmetic logic design, 
 Summary | Full Text:PDF
Overview of Low-Power ULSI Circuit Techniques
Tadahiro KURODA Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/04/25
Vol. E78-C  No. 4 ; pp. 334-344
Type of Manuscript:  INVITED PAPER (Special Issue on Low-Voltage, Low-Power Integrated Circuits)
Category: 
Keyword: 
LSI, CMOS, low-power, low-voltage, power-delay product, energy-delay product, pass-transistor logic, 
 Summary | Full Text:PDF