Keyword : partial scan design

A Partial Scan Design Approach based on Register-Transfer Level Testability Analysis
Akira MOTOHARA Sadami TAKEOKA Mitsuyasu OHTA Michiaki MURAOKA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1996/10/25
Vol. E79-D  No. 10 ; pp. 1436-1442
Type of Manuscript:  Special Section PAPER (Special Issue on Synthesis and Verification of Hardware Design)
Category: Design for Testability
design for testabilitypartial scan designregister-transfer levelautomatic test-pattern generationESDA
 Summary | Full Text:PDF