Keyword : parasitic extraction

Efficient Partial Reluctance Extraction for Large-Scale Regular Power Grid Structures
Shan ZENG Wenjian YU Jin SHI Xianlong HONG Chung-Kuan CHENG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/06/01
Vol. E92-A  No. 6 ; pp. 1476-1484
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
high-frequency effect, inductance modeling, parasitic extraction, partial reluctance, power/ground grid, 
 Summary | Full Text:PDF
Approximation Formula Approach for the Efficient Extraction of On-Chip Mutual Inductances
Atsushi KUROKAWA Takashi SATO Hiroo MASUDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A  No. 12 ; pp. 2933-2941
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Parasitics and Noise
Keyword: 
on-chip inductance, parasitic extraction, VLSI interconnects, inductance extraction, 
 Summary | Full Text:PDF
Fast On-Chip Inductance Extraction of VLSI Including Angled Interconnects
Atsushi KUROKAWA Kotaro HACHIYA Takashi SATO Kazuya TOKUMASU Hiroo MASUDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/04/01
Vol. E86-A  No. 4 ; pp. 841-845
Type of Manuscript:  Special Section LETTER (Special Section of Selected Papers from the 15th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
inductance, parasitic extraction, VLSI interconnect, geometric mean distance, skin effect, 
 Summary | Full Text:PDF