Keyword : parallel


A Novel Parallel 8B/10B Encoder: Architecture and Comparison with Classical Solution
Pietro NANNIPIERI Daniele DAVALLE Luca FANUCCI 
Publication:   
Publication Date: 2018/07/01
Vol. E101-A  No. 7 ; pp. 1120-1122
Type of Manuscript:  LETTER
Category: Digital Signal Processing
Keyword: 
VLSI8b10bparallelencoding
 Summary | Full Text:PDF(246.8KB)

A 48 Cycles/MB H.264/AVC Deblocking Filter Architecture for Ultra High Definition Applications
Dajiang ZHOU Jinjia ZHOU Jiayi ZHU Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/12/01
Vol. E92-A  No. 12 ; pp. 3203-3210
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Embedded, Real-Time and Reconfigurable Systems
Keyword: 
H.264/AVCparalleldeblockingultra high resolutionQFHD
 Summary | Full Text:PDF(2.1MB)

12-Channel DC to 622-Mbit/s/ch Parallel Optical Transmitter and Receiver for Bit-Parallel Raw Data Transmission
Kazunori MIYOSHI Ichiro HATAKEYAMA Jun'ichi SASAKI Takahiro NAKAMURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2001/03/01
Vol. E84-C  No. 3 ; pp. 304-311
Type of Manuscript:  Special Section PAPER (Special Issue on Optical Interconnects/Optical Signal Processing)
Category: Optical Interconnection Systems
Keyword: 
optical transmitteroptical receiverparallelraw data transmission
 Summary | Full Text:PDF(1.6MB)

Dynamic Fast Issue (DFI) Mechanism for Dynamic Scheduled Processors
Abderazek BEN ABDALLAH Mudar SAREM Masahiro SOWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/12/25
Vol. E83-A  No. 12 ; pp. 2417-2425
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: VLSI Architecture
Keyword: 
precise interruptwrite-onceparallelregister renamingout-of-order
 Summary | Full Text:PDF(490.6KB)

A Compositional Approach for Constructing Communication Services and Protocols
Bhed Bahadur BISTA Kaoru TAKAHASHI Norio SHIRATORI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/11/25
Vol. E82-A  No. 11 ; pp. 2546-2557
Type of Manuscript:  Special Section PAPER (Special Section on Concurrent Systems Technology)
Category: 
Keyword: 
protocolserviceFDTcompositionalternativesequentialinterruptparallel
 Summary | Full Text:PDF(605.6KB)

A 10-b 300-MHz Interpolated-Parallel A/D Converter
Hiroshi KIMURA Akira MATSUZAWA Takashi NAKAMURA Shigeki SAWADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/05/25
Vol. E76-C  No. 5 ; pp. 778-786
Type of Manuscript:  Special Section PAPER (Special Section on the 1992 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.28, No.4 April 1993))
Category: 
Keyword: 
A/D converterparallelinterpolationhigh speedhigh resolutionlinearitycircuitbipolarsubmicrometerfoldingencoderlogic
 Summary | Full Text:PDF(868.4KB)