Keyword : offset error

A 65 nm 1.2 V 7-bit 1 GSPS Folding-Interpolation A/D Converter with a Digitally Self-Calibrated Vector Generator
Daeyun KIM Minkyu SONG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/07/01
Vol. E94-C  No. 7 ; pp. 1199-1205
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
folding, interpolation, A/D converter, self-calibration, offset error, 
 Summary | Full Text:PDF(2.3MB)
An Offset Cancelled Winner-Take-All Circuit
Dongsoo KIM Jimin CHEON Gunhee HAN 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/02/01
Vol. E92-A  No. 2 ; pp. 430-435
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
Winner-Take-ALL (WTA), offset error, offset cancellation, threshold variation, device mismatch, 
 Summary | Full Text:PDF(547.2KB)
Analysis of the Effects of Offset Errors in Neural LSIs
Fuyuki OKAMOTO Hachiro YAMADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/09/25
Vol. E80-A  No. 9 ; pp. 1640-1646
Type of Manuscript:  PAPER
Category: Analog Signal Processing
Keyword: 
neural network, analog LSI, offset error, stochastic gradient descent rule, perceptron, 
 Summary | Full Text:PDF(526.6KB)