Keyword : non full-reverse-order constraint


A Relocation Method for Circuit Modifications
Kunihiko YANAGIBASHI Yasuhiro TAKASHIMA Yuichi NAKAMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/12/01
Vol. E90-A  No. 12 ; pp. 2743-2751
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Circuit Synthesis
Keyword: 
non full-reverse-order constraintcircuit modificationrelocationsequence-pairsimulated annealing
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