Keyword : neurochip


Offset-Tolerant Design of Analog Chips for Independent Component Analysis
Ki-Seok CHO Soo-Young LEE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/08/01
Vol. E87-C  No. 8 ; pp. 1382-1387
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
neurochipoffset toleranceICAblind signal separation
 Summary | Full Text:PDF(424.1KB)

Hardware Implementation of a DBM Network with Non-monotonic Neurons
Mitsunaga KINJO Shigeo SATO Koji NAKAJIMA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/03/01
Vol. E85-D  No. 3 ; pp. 558-567
Type of Manuscript:  PAPER
Category: Biocybernetics, Neurocomputing
Keyword: 
neural networknon-monotonicDBM learninganalog circuitneurochip
 Summary | Full Text:PDF(2.8MB)

Hardware Implementation of New Analog Memory for Neural Networks
Koji NAKAJIMA Shigeo SATO Tomoyasu KITAURA Junichi MUROTA Yasuji SAWADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/01/25
Vol. E78-C  No. 1 ; pp. 101-105
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
analog memoryfloating gateneurochipSDAM
 Summary | Full Text:PDF(528.4KB)

LSI Neural Chip of Pulse-Output Network with Programmable Synapse
Shigeo SATO Manabu YUMINE Takayuki YAMA Junichi MUROTA Koji NAKAJIMA Yasuji SAWADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/01/25
Vol. E78-C  No. 1 ; pp. 94-100
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
neurochippulseanalogprogrammable synapse
 Summary | Full Text:PDF(643.7KB)