Keyword : multimedia processor


Physical Design Methodology for On-Chip 64-Mb DRAM MPEG-2 Encoding with a Multimedia Processor
Hidehiro TAKATA Rei AKIYAMA Tadao YAMANAKA Haruyuki OHKUMA Yasue SUETSUGU Toshihiro KANAOKA Satoshi KUMAKI Kazuya ISHIHARA Atsuo HANAMI Tetsuya MATSUMURA Tetsuya WATANABE Yoshihide AJIOKA Yoshio MATSUDA Syuhei IWADE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/02/01
Vol. E85-C  No. 2 ; pp. 368-374
Type of Manuscript:  Special Section PAPER (Special Issue on High-Performance and Low-Power Microprocessors)
Category: Product Designs
Keyword: 
multimedia processorclock skewcross-talk noiseIR dropMPEG-2 encoder
 Summary | Full Text:PDF

A Real-Time MPEG2 Encoding and Decoding Architecture with a Dual-Issue RISC Processor
Akira YAMADA Toyohiko YOSHIDA Tetsuya MATSUMURA Shin-ichi URAMOTO Koji TSUCHIHASHI Edgar HOLMANN 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/09/25
Vol. E81-C  No. 9 ; pp. 1382-1390
Type of Manuscript:  Special Section PAPER (Special Issue on Novel VLSI Processor Architectures)
Category: 
Keyword: 
multimedia processormedia processorVLIWMPEGmicroprocessor
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A 2 V 250 MHz VLIW Multimedia Processor
Toyohiko YOSHIDA Akira YAMADA Edgar HOLMANN Hidehiro TAKATA Atsushi MOHRI Yukihiko SHIMAZU Kiyoshi NAKAKIMURA Keiichi HIGASHITANI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/05/25
Vol. E81-C  No. 5 ; pp. 651-660
Type of Manuscript:  Special Section PAPER (Special Issue on Multimedia, Network, and DRAM LSIs)
Category: 
Keyword: 
multimedia processormedia processorVLIWMPEGAC-3microprocessor
 Summary | Full Text:PDF