Keyword : multi-layered package

Simple Design Formula for Parallel Plate Mode Suppression by Ground Via-Holes in Multi-Layered Packages
Takeshi YUASA Tamotsu NISHINO Hideyuki OH-HASHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/07/01
Vol. E88-C  No. 7 ; pp. 1401-1405
Type of Manuscript:  Special Section PAPER (Special Section on Recent Technologies of Microwave and Millimeter-Wave Devices Focusing on Miniaturization and Advancement in Performance with Their Applications)
Category: Passive Circuits
multi-layered packagevia-holecouplingmode-matching technique
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