Keyword : multi-core processor

Cache-Aware Virtual Machine Scheduling on Multi-Core Architecture
Cheol-Ho HONG Young-Pil KIM Seehwan YOO Chi-Young LEE Chuck YOO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/10/01
Vol. E95-D  No. 10 ; pp. 2377-2392
Type of Manuscript:  PAPER
Category: Software System
Keyword: 
virtualization, cache-aware scheduling strategy, multi-core processor, 
 Summary | Full Text:PDF(1.1MB)
Efficient Implementation of OFDM Inner Receiver on a Programmable Multi-Core Processor Platform
Wenhua FAN Chen CHEN Yun CHEN Zhiyi YU Xiaoyang ZENG 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2012/04/01
Vol. E95-B  No. 4 ; pp. 1241-1248
Type of Manuscript:  Special Section PAPER (Special Section on Cognitive Radio and Heterogeneous Wireless Networks in Conjunction with Main Topics of CrownCom2011)
Category: 
Keyword: 
OFDM, inner receiver, CMMB, multi-core processor, SDR, 
 Summary | Full Text:PDF(1.1MB)
Computation-Communication Overlap of Linpack on a GPU-Accelerated PC Cluster
Junichi OHMURA Takefumi MIYOSHI Hidetsugu IRIE Tsutomu YOSHINAGA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2011/12/01
Vol. E94-D  No. 12 ; pp. 2319-2327
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: 
Keyword: 
parallel processing, multi-core processor, GPU, computation-communication overlap, 
 Summary | Full Text:PDF(636.5KB)
7T SRAM Enabling Low-Energy Instantaneous Block Copy and Its Application to Transactional Memory
Shunsuke OKUMURA Yuki KAGIYAMA Yohei NAKATA Shusuke YOSHIMOTO Hiroshi KAWAGUCHI Masahiko YOSHIMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/12/01
Vol. E94-A  No. 12 ; pp. 2693-2700
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Circuit Design
Keyword: 
SRAM DMA, transactional memory, checkpoint and recovery, multi-core processor, 
 Summary | Full Text:PDF(3.2MB)