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| Keyword : memory
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A 2-Mb 1T1C FeRAM Prototype Based on PMOS-Gating Cell Structure
Yeonbae CHUNG Jung-Hyun KIM Jae-Eun YOON | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2004/10/01
Vol. E87-C
No. 10 ;
pp. 1686-1693
Type of Manuscript:
Special Section PAPER (Special Section on New Era of Nonvolatile Memories)
Category: Ferroelectric Memory
Keyword:
FeRAM, memory, nonvolatile, ferroelectrics, | | | Summary | Full Text:PDF | |
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Perspectives of Low-Power VLSI's
Takayasu SAKURAI | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C
No. 4 ;
pp. 429-436
Type of Manuscript:
INVITED PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
Category:
Keyword:
digital, memory, application, low power, VLSI, leakage, | | | Summary | Full Text:PDF | |
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Numerical Analysis of Metal-Ferroelectric-Semiconductor Field-Effect-Transistors (MFS-FETs) Considering Inhomogeneous Ferroelectric Polarization
Tatsuya KAMEI Eisuke TOKUMITSU Hiroshi ISHIWARA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 1998/04/25
Vol. E81-C
No. 4 ;
pp. 577-583
Type of Manuscript:
Special Section PAPER (Special Issue on Advanced Memory Devices Using High-Dielectric-Constant and Ferroelectric Thin Films)
Category:
Keyword:
ferroelectric, MFSFET, SrBi2Ta2O9, Si non-volatile memory, memory, | | | Summary | Full Text:PDF | |
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On Information Dumping Phenomenon in Free Recall  Effects of Priority Instructions on Free Recall of Pictures and Words
Atsuo MURATA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/09/25
Vol. E80-A
No. 9 ;
pp. 1729-1731
Type of Manuscript:
LETTER
Category: Human Communications and Ergonomics
Keyword:
free recall, memory, priority, information dumping, | | | Summary | Full Text:PDF | |
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BIST Circuit Macro Using Microprogram ROM for LSI Memories
Hiroki KOIKE Toshio TAKESHIMA Masahide TAKADA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 1995/07/25
Vol. E78-C
No. 7 ;
pp. 838-844
Type of Manuscript:
Special Section PAPER (Special Issue on LSI Memory Device, Circuit, Architecture and Application Technologies for Multimedia Age)
Category:
Keyword:
memory, BIST, ROM, tester, macro, | | | Summary | Full Text:PDF | |
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A Low-Power Synchronous SRAM Macrocell with Latch-Type Fast Sense Circuits
Nobutaro SHIBATA Mayumi WATANABE | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 1995/07/25
Vol. E78-C
No. 7 ;
pp. 797-804
Type of Manuscript:
Special Section PAPER (Special Issue on LSI Memory Device, Circuit, Architecture and Application Technologies for Multimedia Age)
Category:
Keyword:
marcocell, memory, synchronous, low power, latch type, | | | Summary | Full Text:PDF | |
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