Keyword : memory system


Process Scheduling Based Memory Energy Management for Multi-Core Mobile Devices
Tiefei ZHANG Tianzhou CHEN 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/10/01
Vol. E95-A  No. 10 ; pp. 1700-1707
Type of Manuscript:  PAPER
Category: Systems and Control
Keyword: 
schedulingenergy efficientmemory systemmulti-coremobile device
 Summary | Full Text:PDF

High Bandwidth, Variable Line-Size Cache Architecture for Merged DRAM/Logic LSIs
Koji INOUE Koji KAI Kazuaki MURAKAMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/09/25
Vol. E81-C  No. 9 ; pp. 1438-1447
Type of Manuscript:  Special Section PAPER (Special Issue on Novel VLSI Processor Architectures)
Category: 
Keyword: 
cachemerged DRAM/logic LSIsmemory system
 Summary | Full Text:PDF