Keyword : memory architecture


A Cost-Effective 1T-4MTJ Embedded MRAM Architecture with Voltage Offset Self-Reference Sensing Scheme for IoT Applications
Masanori HAYASHIKOSHI Hiroaki TANIZAKI Yasumitsu MURAI Takaharu TSUJI Kiyoshi KAWABATA Koji NII Hideyuki NODA Hiroyuki KONDO Yoshio MATSUDA Hideto HIDAKA 
Publication:   
Publication Date: 2019/04/01
Vol. E102-C  No. 4 ; pp. 287-295
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
nonvolatile memorymagnetic memorymemory architecture
 Summary | Full Text:PDF

Impact of Floating Body Type DRAM with the Vertical MOSFET
Yuto NORIFUSA Tetsuo ENDOH 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/05/01
Vol. E94-C  No. 5 ; pp. 705-711
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
floating body type DRAM1T-DRAMmemory architecturevertical MOSFET3D structured deviceLSI
 Summary | Full Text:PDF

Intelligent Memory: An Architecture for Lock-Free Synchronization
Nakun SEONG Naihoon JUNG Byungho KIM Hyunsoo YOON 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1997/04/25
Vol. E80-D  No. 4 ; pp. 441-447
Type of Manuscript:  Special Section PAPER (Special Issue on Parallel and Distributed Supercomputing)
Category: 
Keyword: 
shared memory multiprocessorsynchronizationmemory architecture
 Summary | Full Text:PDF