IEICE Trans

Keyword : low-density parity-check (LDPC) codes

Structural Analysis of Nonbinary Cyclic and Quasi-Cyclic LDPC Codes with α-Multiplied Parity-Check Matrices Haiyang LIU Hao ZHANG Lianrong MA Lingjun KONG
Publication: Publication Date: 2020/11/01 Vol. E103-A No. 11 ; pp. 1299-1303 Type of Manuscript: LETTER Category: Coding Theory Keyword: low-density parity-check (LDPC) codes, nonbinary, cyclic, quasi-cyclic (QC), α-multiplied parity-check matrix (PCM),
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Concatenated LDPC/Trellis Codes: Surpassing the Symmetric Information Rate of Channels with Synchronization Errors Ryo SHIBATA Gou HOSOYA Hiroyuki YASHIMA
Publication: Publication Date: 2020/11/01 Vol. E103-A No. 11 ; pp. 1283-1291 Type of Manuscript: PAPER Category: Coding Theory Keyword: synchronization error, generalized Blahut-Arimoto algorithm, Markov capacity, low-density parity-check (LDPC) codes, trellis codes,
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Design and Construction of Irregular LDPC Codes for Channels with Synchronization Errors: New Aspect of Degree Profiles Ryo SHIBATA Gou HOSOYA Hiroyuki YASHIMA
Publication: Publication Date: 2020/10/01 Vol. E103-A No. 10 ; pp. 1237-1247 Type of Manuscript: PAPER Category: Coding Theory Keyword: synchronization error, low-density parity-check (LDPC) codes, code design, code construction,
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Hardware-Aware Sum-Product Decoding in the Decision Domain Mizuki YAMADA Keigo TAKEUCHI Kiyoyuki KOIKE
Publication: Publication Date: 2019/12/01 Vol. E102-A No. 12 ; pp. 1980-1987 Type of Manuscript: PAPER Category: Coding Theory Keyword: low-density parity-check (LDPC) codes, sum-product (SP) decoding, hardware implementation, decision domain, polynomial approximation,
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On the Second Separating Redundancy of LDPC Codes from Finite Planes Haiyang LIU Yan LI Lianrong MA
Publication: Publication Date: 2018/03/01 Vol. E101-A No. 3 ; pp. 617-622 Type of Manuscript: LETTER Category: Coding Theory Keyword: separating redundancy, separating matrix, low-density parity-check (LDPC) codes, finite plane,
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Further Results on the Minimum and Stopping Distances of Full-Length RS-LDPC Codes Haiyang LIU Hao ZHANG Lianrong MA
Publication: Publication Date: 2017/02/01 Vol. E100-A No. 2 ; pp. 738-742 Type of Manuscript: LETTER Category: Coding Theory Keyword: low-density parity-check (LDPC) codes, RS-LDPC codes, minimum distance, stopping distance,
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Finding Small Fundamental Instantons of LDPC Codes by Path Extension Junjun GUO Jianjun MU Xiaopeng JIAO Guiping LI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2014/04/01 Vol. E97-A No. 4 ; pp. 1001-1004 Type of Manuscript: LETTER Category: Coding Theory Keyword: instanton, error floor, low-density parity-check (LDPC) codes, linear programming (LP),
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Area-Efficient QC-LDPC Decoder Architecture Based on Stride Scheduling and Memory Bank Division Bongjin KIM In-Cheol PARK
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2013/07/01 Vol. E96-B No. 7 ; pp. 1772-1779 Type of Manuscript: PAPER Category: Fundamental Theories for Communications Keyword: low-density parity-check (LDPC) codes, multi-mode decoder, low-area architecture, stride scheduling,
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Adaptive Iterative Decoding of Finite-Length Differentially Encoded LDPC Coded Systems with Multiple-Symbol Differential Detection Yang YU Shiro HANDA Fumihito SASAMORI Osamu TAKYU
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2013/03/01 Vol. E96-B No. 3 ; pp. 847-858 Type of Manuscript: PAPER Category: Wireless Communication Technologies Keyword: adaptive iterative decoding, low-density parity-check (LDPC) codes, differential encoded LDPC coded systems, multiple-symbol differential detection, extrinsic information transfer (EXIT) band chart,
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Further Results on the Stopping Distance of Array LDPC Matrices Haiyang LIU Lu HE Jie CHEN
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2012/05/01 Vol. E95-A No. 5 ; pp. 918-926 Type of Manuscript: PAPER Category: Coding Theory Keyword: low-density parity-check (LDPC) codes, array matrices, stopping distance, minimum Hamming distance,
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Design of Quasi-Cyclic Cycle LDPC Codes over GF(q) ShuKai HU Chao CHEN Rong SUN XinMei WANG
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2012/03/01 Vol. E95-B No. 3 ; pp. 983-986 Type of Manuscript: LETTER Category: Fundamental Theories for Communications Keyword: low-density parity-check (LDPC) codes, nonbinary, quasi-cyclic, minimum Hamming distance, fast encoding,
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Low-Complexity Memory Access Architectures for Quasi-Cyclic LDPC Decoders Ming-Der SHIEH Shih-Hao FANG Shing-Chung TANG Der-Wei YANG
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2012/02/01 Vol. E95-D No. 2 ; pp. 549-557 Type of Manuscript: PAPER Category: Computer System Keyword: error control coding, low-density parity-check (LDPC) codes, quasi-cyclic (QC) LDPC codes, partially parallel architecture, VLSI design,
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Lowering Error Floors of Irregular LDPC Codes by Combining Construction and Decoding Xiaopeng JIAO Jianjun MU Fan FANG Rong SUN
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2012/01/01 Vol. E95-B No. 1 ; pp. 271-274 Type of Manuscript: LETTER Category: Fundamental Theories for Communications Keyword: error floor, low-density parity-check (LDPC) codes, minimum distance, trapping sets,
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Optimized Relay Selection Strategy Based on GF(2^p) for Adaptive Network Coded Cooperation Kaibin ZHANG Liuguo YIN Jianhua LU
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2011/10/01 Vol. E94-B No. 10 ; pp. 2912-2915 Type of Manuscript: LETTER Category: Wireless Communication Technologies Keyword: cooperative wireless network, adaptive network coded cooperation (ANCC), low-density parity-check (LDPC) codes, distributed coding,
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Multi-Stage Decoding Scheme with Post-Processing for LDPC Codes to Lower the Error Floors Beomkyu SHIN Hosung PARK Jong-Seon NO Habong CHUNG
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2011/08/01 Vol. E94-B No. 8 ; pp. 2375-2377 Type of Manuscript: LETTER Category: Fundamental Theories for Communications Keyword: error floor, log-likelihood ratio (LLR), low-density parity-check (LDPC) codes, sum-product algorithm,
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Parity-Check Matrix Extension to Lower the Error Floors of Irregular LDPC Codes Jianjun MU Xiaopeng JIAO Jianguang LIU Rong SUN
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2011/06/01 Vol. E94-B No. 6 ; pp. 1725-1727 Type of Manuscript: LETTER Category: Fundamental Theories for Communications Keyword: error floor, low-density parity-check (LDPC) codes, trapping sets,
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An Improved Decoding Algorithm for Finite-Geometry LDPC Codes Yueguang BIAN Youzheng WANG Jing WANG
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2007/04/01 Vol. E90-B No. 4 ; pp. 978-981 Type of Manuscript: LETTER Category: Fundamental Theories for Communications Keyword: belief propagation (BP), feedback BP (FBP), low-density parity-check (LDPC) codes, iterative decoding, finite-geometry LDPC,
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VLSI Design of a Fully-Parallel High-Throughput Decoder for Turbo Gallager Codes Luca FANUCCI Pasquale CIAO Giulio COLAVOLPE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/07/01 Vol. E89-A No. 7 ; pp. 1976-1986 Type of Manuscript: PAPER Category: Digital Signal Processing Keyword: low-density parity-check (LDPC) codes, belief propagation, iterative decoding, VLSI architectures, parallel decoder architectures,
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Performance and Convergence Analysis of Improved MIN-SUM Iterative Decoding Algorithm Jun HEO
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2004/10/01 Vol. E87-B No. 10 ; pp. 2847-2858 Type of Manuscript: PAPER Category: Fundamental Theories for Communications Keyword: iterative decoding, density evolution, serially concatenated convolution codes (SCCC), low-density parity-check (LDPC) codes,
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