Keyword : low power technique

A Novel Technique to Design Energy-Efficient Contexts for Reconfigurable Logic Devices
Hiroshi SHINOHARA Hideaki MONJI Masahiro IIDA Toshinori SUEYOSHI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2007/12/01
Vol. E90-D  No. 12 ; pp. 1986-1989
Type of Manuscript:  Special Section LETTER (Special Section on Reconfigurable Systems)
Category: 
Keyword: 
low power technique, resource sharing, dynamically reconfigurable logic, 
 Summary | Full Text:PDF
A Technique to Reduce Power Consumption for a Linear Transconductor
Fujihiko MATSUMOTO Isamu YAMAGUCHI Akira YACHIDATE Yasuaki NOGUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/06/01
Vol. E89-C  No. 6 ; pp. 814-818
Type of Manuscript:  Special Section LETTER (Special Section on Analog Circuit and Device Technologies)
Category: 
Keyword: 
analog integrated circuits, MOS transistor, linear transconductor, low power technique, 
 Summary | Full Text:PDF