IEICE Trans

Keyword : low power consumption

Low-Power Implementation Techniques for Convolutional Neural Networks Using Precise and Active Skipping Methods Akira KITAYAMA Goichi ONO Tadashi KISHIMOTO Hiroaki ITO Naohiro KOHMU
Publication: Publication Date: 2021/07/01 Vol. E104-C No. 7 ; pp. 330-337 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology) Category: Keyword: convolutional neural network (CNN), SSD500 network, deep neural network (DNN) implementation, low power consumption, embedded AI technique,
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Analog and Digital Collaborative Design Techniques for Wireless SoCs Ryuichi FUJIMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2016/02/01 Vol. E99-A No. 2 ; pp. 514-522 Type of Manuscript: INVITED PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: wireless, SoC, ISDB-T, 1-segmant broadcasting, TransferJet, Wireless LAN, spurious signal, digital pre-distortion, mismatch calibration, low power consumption,
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Low-Power Wiring Method for Band-Limited Signals in CMOS Logic Circuits by Segmentation Coding with Pseudo-Majority Voting Katsuhiko UEDA Zuiko RIKUHASHI Kentaro HAYASHI Hiroomi HIKAWA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2015/04/01 Vol. E98-C No. 4 ; pp. 356-363 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: CMOS logic circuit, low power consumption, dynamic power consumption, majority voting, bus-invert coding,
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Multicore EDFA for Space Division Multiplexing Yukihiro TSUCHIDA Koichi MAEDA Ryuichi SUGIZAKI
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2014/07/01 Vol. E97-B No. 7 ; pp. 1265-1271 Type of Manuscript: INVITED PAPER (Joint Special Section on Opto-electronics and Communications for Future Optical Network) Category: Keyword: multi-core EDFA, cladding pumping, low power consumption,
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Low Power Consumption Technology for Ultra-High Resolution Mobile Display by Using RGBW System Akira SAKAIGAWA Masaaki KABE Tsutomu HARADA Fumitaka GOTO Naoyuki TAKASAKI Masashi MITSUI Tae NAKAHARA Kojiro IKEDA Kenta SEKI Toshiyuki NAGATSUMA Amane HIGASHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2013/11/01 Vol. E96-C No. 11 ; pp. 1367-1372 Type of Manuscript: INVITED PAPER (Special Section on Electronic Displays) Category: Keyword: low power consumption, ultra-high resolution, LCD, mobile display, RGBW,
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Current-Reused QVCO Based on Source-Connection Coupling Sung-Sun CHOI Han-Yeol YU Yong-Hoon KIM
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/08/01 Vol. E94-C No. 8 ; pp. 1324-1327 Type of Manuscript: BRIEF PAPER Category: Microwaves, Millimeter-Waves Keyword: current-reused VCO, low phase noise, low power consumption, QVCO, source-connection coupling,
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Design of Voltage-Mode MAX-MIN Circuits with Low Area and Low Power Consumption Mohammad SOLEIMANI Abdollah KHOEI Khayrollah HADIDI Vahid Fagih DINAVARI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-A No. 12 ; pp. 3044-3051 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Device and Circuit Modeling and Analysis Keyword: voltage-mode, MAX-MIN operator, high-speed, low area, low power consumption,
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4.8 GHz CMOS Frequency Multiplier Using Subharmonic Pulse-Injection Locking for Spurious Suppression Kyoya TAKANO Mizuki MOTOYOSHI Minoru FUJISHIMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/11/01 Vol. E91-C No. 11 ; pp. 1738-1743 Type of Manuscript: Special Section PAPER (Special Section on Microwave and Millimeter-wave Technologies) Category: Keyword: frequency multiplier, injection locking, pulse, low power consumption, small chip size, CMOS,
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Design of Low Power Track and Hold Circuit Based on Two Stage Structure Takahide SATO Isamu MATSUMOTO Shigetaka TAKAGI Nobuo FUJII
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/06/01 Vol. E91-C No. 6 ; pp. 894-902 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: track and hold circuit, low power consumption, flash analog to digital converter, two-stage structure,
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A 41 mW VGA@30 fps Quadtree Video Encoder for Video Surveillance Systems Qin LIU Seiichiro HIRATSUKA Kazunori SHIMIZU Shinsuke USHIKI Satoshi GOTO Takeshi IKENAGA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/04/01 Vol. E91-C No. 4 ; pp. 449-456 Type of Manuscript: Special Section PAPER (Special Section on Advanced Technologies in Digital LSIs and Memories) Category: Keyword: video surveillance system, motion estimation, ME-MC processor, quadtree, low power consumption,
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A Wide Range 1.0-3.6 V 200 Mbps, Push-Pull Output Buffer Using Parasitic Bipolar Transistors Takahiro SHIMADA Hiromi NOTANI Yasunobu NAKASE Hiroshi MAKINO Shuhei IWADE
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/04/01 Vol. E87-C No. 4 ; pp. 571-577 Type of Manuscript: Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies) Category: Keyword: low power consumption, I/O, parasitic bipolar transistor, forward bias, driver, level converter,
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ECL-Compatible Low-Power-Consumption 10-Gb/s GaAs 8:1 Multiplexer and 1:8 Demultiplexer Nobuhide YOSHIDA Masahiro FUJII Takao ATSUMO Keiichi NUMATA Shuji ASAI Michihisa KOHNO Hirokazu OIKAWA Hiroaki TSUTSUI Tadashi MAEDA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1999/11/25 Vol. E82-C No. 11 ; pp. 1992-1999 Type of Manuscript: Special Section PAPER (Special Issue on High-Frequency/High-Speed Devices for Information and Communication Systems in the 21st Century) Category: Low Power-Consumption RF ICs Keyword: multiplexer, demultiplexer, GaAs, 10 Gb/s, ECL-compatible, low power consumption,
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Future Directions of Media Processors Shunichi ISHIWATA Takayasu SAKURAI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/05/25 Vol. E81-C No. 5 ; pp. 629-635 Type of Manuscript: INVITED PAPER (Special Issue on Multimedia, Network, and DRAM LSIs) Category: Multimedia Keyword: media processor, VLIW, multimedia extension, wide memory bandwidth, low power consumption,
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Ferroelectric Memory Circuit Technology and the Application to Contactless IC Card Koji ASARI Hiroshige HIRANO Toshiyuki HONDA Tatsumi SUMI Masato TAKEO Nobuyuki MORIWAKI George NAKANE Tetsuji NAKAKUMA Shigeo CHAYA Toshio MUKUNOKI Yuji JUDAI Masamichi AZUMA Yasuhiro SHIMADA Tatsuo OTSUKI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/04/25 Vol. E81-C No. 4 ; pp. 488-496 Type of Manuscript: Special Section PAPER (Special Issue on Advanced Memory Devices Using High-Dielectric-Constant and Ferroelectric Thin Films) Category: Keyword: FeRAM, high speed, low voltage, low power consumption, non-volatile, contactless IC card,
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Isolator-Free DFB-LD Module with TEC Control Using Silicon Waferboard Koji TERADA Seimi SASAKI Kazuhiro TANAKA Tsuyoshi YAMAMOTO Tadashi IKEUCHI Kazunori MIURA Mitsuhiro YANO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1997/05/25 Vol. E80-C No. 5 ; pp. 703-706 Type of Manuscript: Special Section LETTER (Special Issue on Photonic Integrated Circuits) Category: Optoelectronic Packaging Keyword: WDM, optical access network, isolator-free, low power consumption, TEC, silicon waferboard,
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PLL Frequency Synthesizer for Low Power Consumption Yasuaki SUMI Kouichi SYOUBU Kazutoshi TSUDA Shigeki OBOTE Yutaka FUKUI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/03/25 Vol. E80-A No. 3 ; pp. 461-465 Type of Manuscript: Special Section PAPER (Special Section of Selected Papers from the 9th Karuizawa Workshop on Circuits and Systems) Category: Keyword: low power consumption, PLL frequency synthesizer, frequency extender, programmable divider, operating frequency, prescaler,
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A 28 mW 16-bit Digital Signal Processor for the PDC Half-Rate CODEC Taketora SHIRAISI Koji KAWAMOTO Kazuyuki ISHIKAWA Eiichi TERAOKA Hidehiro TAKATA Takeshi TOKUDA Kouichi NISHIDA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1996/12/25 Vol. E79-C No. 12 ; pp. 1679-1685 Type of Manuscript: Special Section PAPER (Special Issue on Low-Power LSI Technologies) Category: Keyword: digital signal processor, CODEC, low power consumption,
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A 16-bit Digital Signal Processor with Specially Arranged Multiply-Accumulator for Low Power Consumption Katsuhiko UEDA Toshio SUGIMURA Toshihiro ISHIKAWA Minoru OKAMOTO Mikio SAKAKIHARA Shinichi MARUI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/12/25 Vol. E78-C No. 12 ; pp. 1709-1716 Type of Manuscript: Special Section PAPER (Special Issue on Low-power Analog, Digital LSIs and ASICs for Multimedia) Category: Keyword: integrated electronics, digital signal processor, low power consumption, communication,
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A New Fully-Digitalized π/4-Shift QPSK Modulator for Personal Communication Terminals Tetsu SAKATA Kazuhiko SEKI Shuji KUBOTA Shuzo KATO
Publication: IEICE TRANSACTIONS on Communications Publication Date: 1994/07/25 Vol. E77-B No. 7 ; pp. 921-926 Type of Manuscript: Special Section PAPER (Special Issue on Personal, Indoor and Mobile Radio Communications) Category: Keyword: digitalized modulator, π/4-shift QPSK, low power consumption,
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