IEICE Trans

Keyword : low energy

Real-Time Frame-Rate Control for Energy-Efficient On-Line Object Tracking Yusuke INOUE Takatsugu ONO Koji INOUE
Publication: Publication Date: 2018/12/01 Vol. E101-A No. 12 ; pp. 2297-2307 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: object tracking, low energy, frame-rate optimization,
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Multi-Group Signature Scheme for Simultaneous Verification by Neighbor Services Kenta NOMURA Masami MOHRI Yoshiaki SHIRAISHI Masakatu MORII
Publication: Publication Date: 2017/08/01 Vol. E100-D No. 8 ; pp. 1770-1779 Type of Manuscript: Special Section PAPER (Special Section on Information and Communication System Security) Category: Cryptographic Schemes Keyword: internet of things, local broadcast, digital signature, fiat-shamir transform, low energy,
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Energy Minimization of Full TMR Design with Optimized Selection of Temporal/Spatial TMR Mode and Supply Voltage Kazuhito ITO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2014/12/01 Vol. E97-A No. 12 ; pp. 2530-2539 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: High-Level Synthesis and System-Level Design Keyword: triple modular redundancy, low energy, MIP, simulated annealing, schedule exploration,
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A 40-nm 0.5-V 12.9-pJ/Access 8T SRAM Using Low-Energy Disturb Mitigation Scheme Shusuke YOSHIMOTO Masaharu TERADA Shunsuke OKUMURA Toshikazu SUZUKI Shinji MIYANO Hiroshi KAWAGUCHI Masahiko YOSHIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/04/01 Vol. E95-C No. 4 ; pp. 572-578 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology) Category: Keyword: SRAM, 8T, low energy, disturb, half select, write back,
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Temperature-Aware Configurable Cache to Reduce Energy in Embedded Systems Hamid NOORI Maziar GOUDARZI Koji INOUE Kazuaki MURAKAMI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/04/01 Vol. E91-C No. 4 ; pp. 418-431 Type of Manuscript: Special Section PAPER (Special Section on Advanced Technologies in Digital LSIs and Memories) Category: Keyword: temperature-aware design, cache memory, leakage current, low energy, embedded systems,
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Return Address Protection on Cache Memories Koji INOUE
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/12/01 Vol. E89-C No. 12 ; pp. 1937-1947 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: low energy, security, cache, buffer overflow, stack smashing,
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Framed ALOHA for Multiple RFID Objects Identification Bin ZHEN Mamoru KOBAYASHI Masashi SHIMIZU
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2005/03/01 Vol. E88-B No. 3 ; pp. 991-999 Type of Manuscript: Special Section PAPER (Special Section on Ubiquitous Networks) Category: Network Keyword: RFID, anti-collision, framed ALOHA, low energy,
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Impacts of Compiler Optimizations on Address Bus Energy: An Empirical Study Hiroyuki TOMIYAMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/10/01 Vol. E87-A No. 10 ; pp. 2815-2820 Type of Manuscript: LETTER Category: VLSI Design Technology and CAD Keyword: compiler optimization, embedded systems, low energy, bus encoding,
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Memory Data Organization for Low-Energy Address Buses Hiroyuki TOMIYAMA Hiroaki TAKADA Nikil D. DUTT
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/04/01 Vol. E87-C No. 4 ; pp. 606-612 Type of Manuscript: Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies) Category: Keyword: compilers, embedded processors, memory data organization, low energy, bus encoding,
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Memory Organization for Low-Energy Processor-Based Application-Specific Systems Yun CAO Hiroto YASUURA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2002/08/01 Vol. E85-C No. 8 ; pp. 1616-1624 Type of Manuscript: PAPER Category: Optoelectronics Keyword: low energy, memory organization, variable analysis, application-specific system,
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A High-Performance and Low-Power Cache Architecture with Speculative Way-Selection Koji INOUE Tohru ISHIHARA Kazuaki MURAKAMI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2000/02/25 Vol. E83-C No. 2 ; pp. 186-194 Type of Manuscript: Special Section PAPER (Special Issue on Low-Power High-Speed CMOS LSI Technologies) Category: Keyword: cache, low power, low energy, way prediction, high performance,
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