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| Keyword : lock range
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Injection Locked Charge-Pump PLL with a Replica of the Ring Oscillator
Jeonghoon HAN Masaya MIYAHARA Akira MATSUZAWA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2014/04/01
Vol. E97-C
No. 4 ;
pp. 316-324
Type of Manuscript:
Special Section PAPER (Special Section on Solid-State Circuit Design,---,Architecture, Circuit, Device and Design Methodology)
Category:
Keyword:
Injection-lock, ring oscillator, lock range, PLL, | | | Summary | Full Text:PDF(2.8MB) | |
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A 0.25 µm CMOS/SIMOX PLL Clock Generator Embedded in a Gate Array LSI with a Locking Range of 5 to 500 MHz
Hiroki SUTOH Kimihiro YAMAKOSHI | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 1999/07/25
Vol. E82-C
No. 7 ;
pp. 1334-1340
Type of Manuscript:
PAPER
Category: Integrated Electronics
Keyword:
PLL, CMOS/SIMOX, VCO, clock, jitter, skew, lock range, | | | Summary | Full Text:PDF(2MB) | |
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Design of a 3.2 GHz 50 mW 0.5 µm GaAs PLL-Based Clock Generator with 1 V Power Supply
Tadayoshi ENOMOTO Toshiyuki OKUYAMA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 1994/12/25
Vol. E77-C
No. 12 ;
pp. 1957-1965
Type of Manuscript:
Special Section PAPER (Special Issue on Multimedia, Analog and Processing LSIs)
Category: Processor Interfaces
Keyword:
phase-locked loop (PLL), clock pulse generator (CG), voltage controlled ring oscillater (VCO), VCO gain, GaAs, MESFET, DCFL circuit, pull-in frequency, pull-in range, pull-in time, lock range, lock time, locked state, | | | Summary | Full Text:PDF(762KB) | |
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