Keyword : local interconnect


A 6.93-µm2 Full CMOS SRAM Cell Technology for 1.8-V High-Performance Cache Memory
Masataka MINAMI Nagatoshi OHKI Hiroshi ISHIDA Toshiaki YAMANAKA Akihiro SHIMIZU Koichiro ISHIBASHI Akira SATOH Tokuo KURE Takashi NISHIDA Takahiro NAGANO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/04/25
Vol. E80-C  No. 4 ; pp. 590-596
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
SRAMfull CMOS celllocal interconnectTiN
 Summary | Full Text:PDF

A Capacitor over Bit-Line (COB) Stacked Capacitor Cell Using Local Interconnect Layer for 64 MbDRAMs
Naoki KASAI Masato SAKAO Toshiyuki ISHIJIMA Eiji IKAWA Hirohito WATANABE Toshio TAKESHIMA Nobuhiro TANABE Kazuo TERADA Takamaro KIKKAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/04/25
Vol. E76-C  No. 4 ; pp. 548-555
Type of Manuscript:  Special Section PAPER (Special Issue on Sub-Half Micron Si Device and Process Technologies)
Category: Device Technology
Keyword: 
DRAMmemory cellstacked capacitorlocal interconnect
 Summary | Full Text:PDF