Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/10/01
Vol. E85-D
No. 10 ;
pp. 1564-1570
Type of Manuscript:
Special Section PAPER (Special Issue on Test and Verification of VLSI)
Category: EB Tester
Keyword:
EB tester, line delay fault, fault localization, layout analysis, combinational circuits, |
