Keyword : layout optimization


Modeling and Layout Optimization of MOM Capacitor for High-Frequency Applications
Yuka ITANO Taishi KITANO Yuta SAKAMOTO Kiyotaka KOMOKU Takayuki MORISHITA Nobuyuki ITOH 
Publication:   
Publication Date: 2018/02/01
Vol. E101-A  No. 2 ; pp. 441-446
Type of Manuscript:  Special Section LETTER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
MOM capacitorparasitic resistanceparasitic inductancelayout optimization
 Summary | Full Text:PDF(1012.4KB)

A Novel Layout Optimization Technique for Miniaturization and Accurate Design of MMICs
Shin CHAKI Yoshinobu SASAKI Naoto ANDOH Yasuharu NAKAJIMA Kazuo NISHITANI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/11/25
Vol. E82-C  No. 11 ; pp. 1960-1967
Type of Manuscript:  INVITED PAPER (Special Issue on High-Frequency/High-Speed Devices for Information and Communication Systems in the 21st Century)
Category: Low Power-Consumption RF ICs
Keyword: 
MMICcircuit designminiaturizationlayout optimizationelectromagnetic analysisSAMFETLNA
 Summary | Full Text:PDF(1.7MB)