Keyword : jitter


Low-Jitter Design for Second-Order Time-to-Digital Converter Using Frequency Shift Oscillators
Keisuke OKUNO Toshihiro KONISHI Shintaro IZUMI Masahiko YOSHIMOTO Hiroshi KAWAGUCHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/07/01
Vol. E98-A  No. 7 ; pp. 1475-1481
Type of Manuscript:  Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
TDCFSOjitterdesign methodology
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Jitter Amplifier for Oscillator-Based True Random Number Generator
Takehiko AMAKI Masanori HASHIMOTO Takao ONOYE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/03/01
Vol. E96-A  No. 3 ; pp. 684-696
Type of Manuscript:  PAPER
Category: Cryptography and Information Security
Keyword: 
true random number generatorjitter
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Adaptive Limited Dynamic Bandwidth Allocation Scheme to Improve Bandwidth Sharing Efficiency in Hybrid PON Combining FTTH and Wireless Sensor Networks
Monir HOSSEN Masanori HANAWA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2013/01/01
Vol. E96-B  No. 1 ; pp. 127-134
Type of Manuscript:  PAPER
Category: Network
Keyword: 
WSNDBA algorithmbandwidth utilizationjitterupstream efficiencydelay
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A Jitter Insertion and Accumulation Model for Clock Repeaters
Monica FIGUEIREDO Rui L. AGUIAR 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/12/01
Vol. E95-A  No. 12 ; pp. 2430-2442
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
jitternoiseCMOS clock repeaters
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Extension of the LTV Phase Noise Model of Electrical Oscillators for the Output Harmonics
Seyed Amir HASHEMI Hassan GHAFOORIFARD Abdolali ABDIPOUR 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/12/01
Vol. E95-C  No. 12 ; pp. 1846-1856
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
impulse sensitivity functionlinear time variantphase noisejitter
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A Tracking System Using a Differential Detector for M-ary Bi-orthogonal Spread Spectrum Communication Systems
Junya KAWATA Kouji OHUCHI Hiromasa HABUCHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/12/01
Vol. E94-A  No. 12 ; pp. 2737-2745
Type of Manuscript:  Special Section PAPER (Special Section on Wideband Systems)
Category: 
Keyword: 
M-ary bi-orthogonal SS systemdifferential detectorjittercanceler
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Performance Analysis of a 10-Gb/s Millimeter-Wave Impulse Radio Transmitter
Yasuhiro NAKASHA Naoki HARA Kiyomichi ARAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/10/01
Vol. E94-C  No. 10 ; pp. 1557-1564
Type of Manuscript:  Special Section PAPER (Special Section on Microwave and Millimeter-Wave Technology)
Category: Active Devices and Circuits
Keyword: 
impulse radiomillimeter-wavepulse generatorband-pass filterjitterintersymbol interference
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Robust Scheduling Scheme to Reduce Queue Length Fluctuation in Streaming Services
Hyun Jong KIM Seong Gon CHOI 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2011/05/01
Vol. E94-B  No. 5 ; pp. 1452-1455
Type of Manuscript:  LETTER
Category: Network
Keyword: 
schedulingAQMDiffServQoSjitterIPTV
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A Clock Generator with Clock Period, Duty-Ratio and I/Q-Balance Adjustment Capabilities for On-Chip Timing-Margin Tests
Shunichi KAERIYAMA Mikihiro KAJITA Masayuki MIZUNO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/01/01
Vol. E94-C  No. 1 ; pp. 102-109
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
clock generatorduty ratiofrequency synthesisI/Q balancejittertiming margin
 Summary | Full Text:PDF

Performance of DS/SS System Using Pseudo-Ternary M-Sequences
Ryo ENOMOTO Hiromasa HABUCHI Koichiro HASHIURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/11/01
Vol. E93-A  No. 11 ; pp. 2299-2306
Type of Manuscript:  Special Section PAPER (Special Section on Signal Design and its Application in Communications)
Category: Spread Spectrum Technologies and Applications
Keyword: 
spreading code sequencespread spectrumsignal trackingdelay-locked loopjitterbit error rate
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Towards a Fairness Multimedia Transmission Using Layered-Based Multicast Protocol
Heru SUKOCO Yoshiaki HORI Hendrawan  Kouichi SAKURAI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/11/01
Vol. E93-D  No. 11 ; pp. 2953-2961
Type of Manuscript:  Special Section PAPER (Special Section on Architectures, Protocols, and Applications for the Future Internet)
Category: 
Keyword: 
TCP friendlyReceiver-driven Layered Multicastnetwork simulatorParetoquality of servicejitterthroughputpacket loss ratiofairnessconvergence time
 Summary | Full Text:PDF

A Supplementary of WiMax Downlink Scheduling for Jitter Sensitive Traffic
Yen-Wen CHEN Ming-Huang TSAI 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2010/10/01
Vol. E93-B  No. 10 ; pp. 2769-2772
Type of Manuscript:  LETTER
Category: Network
Keyword: 
WiMaxQoS schedulingjitter
 Summary | Full Text:PDF

Jitter-Induced Noise Spectrum at the Output of Continuous-Time ΔΣ Modulators with NRZ Feedback Waveform
Hossein SHAMSI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/11/01
Vol. E92-C  No. 11 ; pp. 1406-1409
Type of Manuscript:  BRIEF PAPER
Category: Electronic Circuits
Keyword: 
delta-sigma modulatorcontinuous-timeNRZ waveformjitterlinear system theory
 Summary | Full Text:PDF

Analysis of Jitter in CMOS Ring Oscillators due to Power Supply Noise
Xiaoying DENG Xin CHEN Jun YANG Jianhui WU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/07/01
Vol. E92-C  No. 7 ; pp. 973-975
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
power supply noisering oscillatorjitter
 Summary | Full Text:PDF

Accurate Eye Diagram Prediction Based on Step Response and Its Application to Low-Power Equalizer Design
Wenjian YU Rui SHI Chung-Kuan CHENG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/04/01
Vol. E92-C  No. 4 ; pp. 444-452
Type of Manuscript:  Special Section PAPER (Special Section on Low-Leakage, Low-Voltage, Low-Power and High-Speed Technologies for System LSIs in Deep-Submicron Era)
Category: 
Keyword: 
eye diagramjitterlossy transmission linestep response
 Summary | Full Text:PDF

Jitter-Conscious Bus Arbitration Scheme for Real-Time Systems
Jong-Ho ROH Minje JUN Kwanhu BANG Eui-Young CHUNG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/02/01
Vol. E92-A  No. 2 ; pp. 643-647
Type of Manuscript:  LETTER
Category: VLSI Design Technology and CAD
Keyword: 
jitterQoSarbitrationqueuereal-time
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Reduced Congestion Queuing: QoS Support for Optimizing Base Station Layout in Multihop Wireless Networks
Akira TANAKA Susumu YOSHIDA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2008/11/01
Vol. E91-B  No. 11 ; pp. 3779-3783
Type of Manuscript:  LETTER
Category: Terrestrial Radio Communications
Keyword: 
multihop wireless networkdelaypriority controlbase station densityjitterlatency
 Summary | Full Text:PDF

A PVT Tolerant STM-16 Clock-and-Data Recovery LSI Using an On-Chip Loop-Gain Variation Compensation Architecture in 0.20-µm CMOS/SOI
Yusuke OHTOMO Hiroshi KOIZUMI Kazuyoshi NISHIMURA Masafumi NOGAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/04/01
Vol. E91-C  No. 4 ; pp. 655-661
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
LSICDRCMOSSOIjitter
 Summary | Full Text:PDF

A Low-Power Low-Noise Clock Signal Generator for Next-Generation Mobile Wireless Terminals
Akihide SAI Daisuke KUROSE Takafumi YAMAJI Tetsuro ITAKURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/02/01
Vol. E91-A  No. 2 ; pp. 557-560
Type of Manuscript:  Special Section LETTER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
clock generatorjitterPLLAnalog-to-Digital Converter (ADC)
 Summary | Full Text:PDF

Application of Microwave and Millimeter-Wave Circuit Technologies to InGaP-HBT ICs for 40-Gbps Optical Transmission Systems
Ken'ichi HOSOYA Yasuyuki SUZUKI Yasushi AMAMIYA Zin YAMAZAKI Masayuki MAMADA Akira FUJIHARA Masafumi KAWANAKA Shin'ichi TANAKA Shigeki WADA Hikaru HIDA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/09/01
Vol. E90-C  No. 9 ; pp. 1685-1694
Type of Manuscript:  Special Section PAPER (Special Section on Microwave and Millimeter-Wave Technology)
Category: Active Devices/Circuits
Keyword: 
microwavemillimeter-waveMMICGaAs HBToptical transmission systemdistributed amplifierfrequency doublerphase shifterflip flopjitterimpedance matching
 Summary | Full Text:PDF

Control-Invariance of Sampled-Data Hybrid Systems with Clocked Events and Jitters
Yoshiyuki TSUCHIE Toshimitsu USHIO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/04/01
Vol. E90-A  No. 4 ; pp. 707-714
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
hybrid automatonjittercontrol-invariancestate feedback
 Summary | Full Text:PDF

Spread-Spectrum Clock Generator for Serial ATA with Multi-Bit ΣΔ Modulator-Controlled Fractional PLL
Masaru KOKUBO Takashi KAWAMOTO Takashi OSHIMA Takayuki NOTO Masato SUZUKI Shigeyuki SUZUKI Takashi HAYASAKA Tomoaki TAKAHASHI Jun KASAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/11/01
Vol. E89-C  No. 11 ; pp. 1682-1688
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
PLLspread-spectrumjitterserial ATA
 Summary | Full Text:PDF

All Digital Dividing Ratio Changeable PLL Using Delay Clock Pulse with Low Jitter
Mitsutoshi YAHARA Kuniaki FUJIMOTO Hirofumi SASAKI Takashi SHIBUYA Yoshinori HIGASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/06/01
Vol. E89-A  No. 6 ; pp. 1527-1532
Type of Manuscript:  Special Section PAPER (Special Section on Papers Selected from 2005 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2005))
Category: 
Keyword: 
PLLjitterdelay clocklock-in rangedigital
 Summary | Full Text:PDF

High-Speed Continuous-Time Subsampling Bandpass ΔΣ AD Modulator Architecture Employing Radio Frequency DAC
Masafumi UEMORI Haruo KOBAYASHI Tomonari ICHIKAWA Atsushi WADA Koichiro MASHIKO Toshiro TSUKADA Masao HOTTA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/04/01
Vol. E89-A  No. 4 ; pp. 916-923
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
continuous-timesubsamplingbandpassΔΣ modulatorRF DACjitter
 Summary | Full Text:PDF

A Method to Derive SSO Design Rule Considering Jitter Constraint
Koutaro HACHIYA Hiroyuki KOBAYASHI Takaaki OKUMURA Takashi SATO Hiroki OKA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/04/01
Vol. E89-A  No. 4 ; pp. 865-872
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
simultaneous switching outputsimultaneous switching noisejitterASIC
 Summary | Full Text:PDF

A State Dependent RED: An Enhanced Active Queue Management Scheme for Real-Time Internet Services
Intae RYOO Meehyea YANG 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2006/02/01
Vol. E89-B  No. 2 ; pp. 614-617
Type of Manuscript:  LETTER
Category: Internet
Keyword: 
queue managementstate dependent REDjitter
 Summary | Full Text:PDF

A Wide Frequency Range Delay-Locked Loop Using Multi-Phase Frequency Detection Technique
Kang-Yoon LEE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/09/01
Vol. E88-C  No. 9 ; pp. 1900-1902
Type of Manuscript:  LETTER
Category: Integrated Electronics
Keyword: 
delay-locked loopmulti-phasefrequency detectionjitter
 Summary | Full Text:PDF

β-Adaptive Playout Scheme for Voice over IP Applications
Younchan JUNG J. William ATWOOD 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2005/05/01
Vol. E88-B  No. 5 ; pp. 2189-2192
Type of Manuscript:  LETTER
Category: Internet
Keyword: 
Internet phone applicationsβ-adaptive playoutlateness loss ratesbuffering delayjitter
 Summary | Full Text:PDF

Design Techniques of Delay-Locked Loop for Jitter Minimization in DRAM Applications
In-Young CHUNG Youngsoo SOHN Wonki PARK Changhyun KIM 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/04/01
Vol. E88-C  No. 4 ; pp. 753-759
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
DLLjittercounterhysteresiscompensationpower noiseglitch
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A Performance Prediction of Clock Generation PLLs: A Ring Oscillator Based PLL and an LC Oscillator Based PLL
Takahito MIYAZAKI Masanori HASHIMOTO Hidetoshi ONODERA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/03/01
Vol. E88-C  No. 3 ; pp. 437-444
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
clock generation PLLLC oscillatorring oscillatorperformance predictionjitterpower consumptionchip area
 Summary | Full Text:PDF

Input-Dependent Sampling-Time Error Effects Due to Finite Clock Slope in MOS Samplers
Naoto HAYASAKA Haruo KOBAYASHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/06/01
Vol. E87-C  No. 6 ; pp. 1015-1021
Type of Manuscript:  Special Section LETTER (Special Section on Analog Circuit and Device Technologies)
Category: 
Keyword: 
samplingjitterMOS switchtrack/hold circuitADC
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A Clock and Data Recovery PLL for Variable Bit Rate NRZ Data Using Adaptive Phase Frequency Detector
Gijun IDEI Hiroaki KUNIEDA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/06/01
Vol. E87-C  No. 6 ; pp. 956-963
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
Category: 
Keyword: 
capture rangeCCOCDRclock and data recoveryfalse lockjitterNRZPFDPLLVCOz-domain analysis
 Summary | Full Text:PDF

Toward QoS Management of VoIP: Experimental Investigation of the Relations between IP Network Performances and VoIP Speech Quality
Hiroki FURUYA Shinichi NOMOTO Hideaki YAMADA Norihiro FUKUMOTO Fumiaki SUGAYA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2004/06/01
Vol. E87-B  No. 6 ; pp. 1610-1622
Type of Manuscript:  PAPER
Category: Internet
Keyword: 
VoIPQoSspeech qualityIP networkjitter
 Summary | Full Text:PDF

A New Phase Detector Scheme for Reducing Jitter in Clock Recovery Circuits
Kang-Yoon LEE Deog-Kyoon JEONG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/02/01
Vol. E86-C  No. 2 ; pp. 224-228
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
phase detectorjitterclock recoveryPLL
 Summary | Full Text:PDF

Jitter in SRTS Systems
Jonggil LEE Hyunchul KANG Seung-Kuk CHOI 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2002/02/01
Vol. E85-B  No. 2 ; pp. 550-553
Type of Manuscript:  LETTER
Category: Transmission Systems and Transmission Equipment
Keyword: 
jittersynchronous residual time stampATM
 Summary | Full Text:PDF

Sampling Jitter and Finite Aperture Time Effects in Wideband Data Acquisition Systems
Haruo KOBAYASHI Kensuke KOBAYASHI Masanao MORIMURA Yoshitaka ONAYA Yuuich TAKAHASHI Kouhei ENOMOTO Hideyuki KOGURE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/02/01
Vol. E85-A  No. 2 ; pp. 335-346
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
jitterphase noiseaperture timeaperture windowsamplingequivalent-time samplingADCtrack/hold circuitdigitizing oscilloscope
 Summary | Full Text:PDF

A 1.0 Gbps CMOS Oversampling Data Recovery Circuit with Fine Delay Generation Method
Jun-Young PARK Jin-Ku KANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/06/25
Vol. E83-A  No. 6 ; pp. 1100-1105
Type of Manuscript:  Special Section PAPER (Special Section of Papers Selected from 1999 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC'99))
Category: 
Keyword: 
oversampling data recoveryPLLDLLjitter
 Summary | Full Text:PDF

A 0.25 µm CMOS/SIMOX PLL Clock Generator Embedded in a Gate Array LSI with a Locking Range of 5 to 500 MHz
Hiroki SUTOH Kimihiro YAMAKOSHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/07/25
Vol. E82-C  No. 7 ; pp. 1334-1340
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
PLLCMOS/SIMOXVCOclockjitterskewlock range
 Summary | Full Text:PDF

Scalability Issues in Optical Networks
Peter OHLEN Eilert BERGLIND Lars THYLEN 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1999/02/25
Vol. E82-B  No. 2 ; pp. 231-238
Type of Manuscript:  INVITED PAPER (Joint Special Issue on Photonics in Switching: Systems and Devices)
Category: Photonic Networking
Keyword: 
optical communicationnoisejitterrepeatersoptoelectronic devices
 Summary | Full Text:PDF

Scalability Issues in Optical Networks
Peter OHLEN Eilert BERGLIND Lars THYLEN 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/02/25
Vol. E82-C  No. 2 ; pp. 179-186
Type of Manuscript:  INVITED PAPER (Joint Special Issue on Photonics in Switching: Systems and Devices)
Category: Photonic Networking
Keyword: 
optical communicationnoisejitterrepeatersoptoelectronic devices
 Summary | Full Text:PDF

Simulation Study on Multi-Hop Jitter Behavior in Integrated ATM Network with CATV and Internet
Naotoshi ADACHI Shoji KASAHARA Yutaka TAKAHASHI 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1998/12/25
Vol. E81-B  No. 12 ; pp. 2413-2422
Type of Manuscript:  Special Section PAPER (Special Issue on the Latest Development of Telecommunication Research)
Category: QoS Control and Traffic Control
Keyword: 
ATMCATVinternetMPEG2multicastjitter
 Summary | Full Text:PDF

The Phase Locked Loop for Clock Recovery Used in a Single-Chip 4-Channel 155Mb/s CMOS ATM Physical Layer Controller LSI
Takehiko NAKAO Masanori KUWAHARA Yasuo OHARA Reiji ARIYOSHI Toshihiko KITAZUME Naoki SUGAWA Takeshi OGAWARA Satoshi ODA Shoji NOMURA Yuichi MIYAZAWA Akira KANUMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/05/25
Vol. E81-C  No. 5 ; pp. 746-749
Type of Manuscript:  Special Section LETTER (Special Issue on Multimedia, Network, and DRAM LSIs)
Category: 
Keyword: 
PLLjitterATMQPLC
 Summary | Full Text:PDF

Generation of Low Timing Jitter, Sub-Picosecond Optical Pulses Using a Gain-Switched DFB-LD with CW Light Injection and a Nonlinear Optical Loop Mirror
Hiroshi OHTA Seiji NOGIWA Haruo CHIBA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/02/25
Vol. E81-C  No. 2 ; pp. 166-168
Type of Manuscript:  Special Section LETTER (Special Issue on Ultrashort Optical Pulse Technologies and their Applications)
Category: 
Keyword: 
pulse compressionfiberlaserjittergain-switching
 Summary | Full Text:PDF

Optimal Loop Bandwidth Design for Low Noise PLL Applications
Kyoohyun LIM Seung Hee CHOI Beomsup KIM 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/10/25
Vol. E80-A  No. 10 ; pp. 1979-1985
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
optimal bandwidthPLLjitterlow noise
 Summary | Full Text:PDF

A PLL-Based Programmable Clock Generator with 50-to 350-MHz Oscillating Range for Video Signal Processors
Junichi GOTO Masakazu YAMASHINA Toshiaki INOUE Benjamin S. SHIH Youichi KOSEKI Tadahiko HORIUCHI Nobuhisa HAMATAKE Kouichi KUMAGAI Tadayoshi ENOMOTO Hachiro YAMADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/12/25
Vol. E77-C  No. 12 ; pp. 1951-1956
Type of Manuscript:  Special Section PAPER (Special Issue on Multimedia, Analog and Processing LSIs)
Category: Processor Interfaces
Keyword: 
electronic circuitsclock generatorPLLfrequency multiplicationVCOVCO gainjitterpull-in rangeCMOSVSP
 Summary | Full Text:PDF

Computer Simulation of Jitter Characteristics of PLL for Arbitrary Data and Jitter Patterns
Kenichi NAKASHI Hiroyuki SHIRAHAMA Kenji TANIGUCHI Osamu TSUKAHARA Tohru EZAKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1994/06/25
Vol. E77-A  No. 6 ; pp. 977-984
Type of Manuscript:  Special Section PAPER (Special Section of Papers Selected from 1993 Joint Technical Conference on Circuits/Systems, Computers and Communications (JTC-CSCC'93))
Category: Analog Circuits and Signal Processing
Keyword: 
PLLjittertime-domain simulationphase detectorNRZretiming
 Summary | Full Text:PDF

External Clocking PRML Magnetic Recording Channel for Discrete Track Media
Hiroaki YADA Takamichi YAMAKOSHI Noriyuki YAMAMOTO Murat ERKOCEVIC Nobuhiro HAYASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/07/25
Vol. E76-A  No. 7 ; pp. 1164-1166
Type of Manuscript:  Special Section LETTER (Special Section of Letters Selected from the 1993 IEICE Spring Conference)
Category: 
Keyword: 
rigid disksampled servo formatclockingjittererror rate
 Summary | Full Text:PDF