Keyword : instruction

Efficient DSP Architecture for Viterbi Decoding with Small Trace Back Latency
Weon Heum PARK Myung Hoon SUNWOO Seong Keun OH 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2006/10/01
Vol. E89-B  No. 10 ; pp. 2813-2818
Type of Manuscript:  PAPER
Category: Fundamental Theories for Communications
Viterbi algorithmDSPtrace backinstructionVLSI architecturewireless communication
 Summary | Full Text:PDF

Instruction Based Synthesizable Testbench Architecture
Ho-Seok CHOI Hae-Wook CHOI Sin-Chong PARK 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/05/01
Vol. E89-C  No. 5 ; pp. 653-657
Type of Manuscript:  LETTER
Category: Integrated Electronics
 Summary | Full Text:PDF