IEICE Trans

Keyword : high-speed

A Low-Power High-Speed Sensing Scheme for Single-Ended SRAM Dashan SHI Heng YOU Jia YUAN Yulian WANG Shushan QIAO
Publication: Publication Date: 2022/11/01 Vol. E105-C No. 11 ; pp. 712-719 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: low-power, high-speed, SRAM, sensing-scheme,
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A Configurable Hardware Word Re-Ordering Block for Multi-Lane Communication Protocols: Design and Use Case Pietro NANNIPIERI Gianmarco DINELLI Luca FANUCCI
Publication: Publication Date: 2019/05/01 Vol. E102-A No. 5 ; pp. 747-749 Type of Manuscript: LETTER Category: Communication Theory and Signals Keyword: VLSI, multi-lane, high-speed, word re-ordering, SpaceFibre,
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A Wide Bandwidth Analog Baseband Circuit for 60-GHz Proximity Wireless Communication Receiver in 65-nm CMOS Masanori FURUTA Hidenori OKUNI Masahiro HOSOYA Akihide SAI Junya MATSUNO Shigehito SAIGUSA Tetsuro ITAKURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2015/02/01 Vol. E98-A No. 2 ; pp. 492-499 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: time-interleaved, SAR, ADC, dynamic, T/H circuit, high-speed, low-power,
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135GHz 98mW 10Gbps CMOS Amplitude Shift Keying Transmitter and Receiver Chipset Mizuki MOTOYOSHI Naoko ONO Kosuke KATAYAMA Kyoya TAKANO Minoru FUJISHIMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2014/01/01 Vol. E97-A No. 1 ; pp. 86-93 Type of Manuscript: Special Section PAPER (Special Section on Wideband Systems) Category: Implementation Keyword: CMOS, D-band, high-speed, wireless, ASK transceiver, short-millimeter-wave,
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A 36-mW 1.5-GS/s 7-Bit Time-Interleaved SAR ADC Using Source Follower Based Track-and-Hold Circuit in 65-nm CMOS Masanori FURUTA Ippei AKITA Junya MATSUNO Tetsuro ITAKURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2013/07/01 Vol. E96-A No. 7 ; pp. 1552-1561 Type of Manuscript: PAPER Category: Analog Signal Processing Keyword: time-interleaved, SAR, ADC, dynamic, T/H circuit, high-speed, low-power,
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A Precision and High-Speed Behavioral Simulation Method for Transient Response and Frequency Characteristics of Switching Converters Toru SAI Shoko SUGIMOTO Yasuhiro SUGIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/06/01 Vol. E95-C No. 6 ; pp. 1067-1076 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: DC-DC converter, behavioral analog simulation, high-speed, highly accurate, buck converter, boost converter,
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Design of Voltage-Mode MAX-MIN Circuits with Low Area and Low Power Consumption Mohammad SOLEIMANI Abdollah KHOEI Khayrollah HADIDI Vahid Fagih DINAVARI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-A No. 12 ; pp. 3044-3051 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Device and Circuit Modeling and Analysis Keyword: voltage-mode, MAX-MIN operator, high-speed, low area, low power consumption,
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A 0.8-V 250-MSample/s Double-Sampled Inverse-Flip-Around Sample-and-Hold Circuit Based on Switched-Opamp Architecture Hsin-Hung OU Bin-Da LIU Soon-Jyh CHANG
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/09/01 Vol. E91-C No. 9 ; pp. 1480-1487 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: switched-opamp, low-voltage, high-speed, sample-and-hold, double-sampling,
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A High-Speed Design of Montgomery Multiplier Yibo FAN Takeshi IKENAGA Satoshi GOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/04/01 Vol. E91-A No. 4 ; pp. 971-977 Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 20th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: Montgomery multiplier, high-speed, high-radix, scalable,
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A New EnergyDelay-Aware Flip-Flop Inhwa JUNG Moo-young KIM Dongsuk SHIN Seon Wook KIM Chulwoo KIM
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/06/01 Vol. E89-A No. 6 ; pp. 1552-1557 Type of Manuscript: Special Section PAPER (Special Section on Papers Selected from 2005 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2005)) Category: Keyword: flip-flop, pulsed-latch, low-power, high-speed,
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New Current-Mirror Sense Amplifier Design for High-Speed SRAM Applications Chun-Lung HSU Mean-Hom HO Chin-Feng LIN
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/02/01 Vol. E89-A No. 2 ; pp. 377-384 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: current-mirror sense amplifier, high-speed, low-voltage, SRAM,
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A Sub-0.5 V Differential ED-CMOS/SOI Circuit with Over-1-GHz Operation Takakuni DOUSEKI Toshishige SHIMAMURA Nobutaro SHIBATA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/04/01 Vol. E88-C No. 4 ; pp. 582-588 Type of Manuscript: Special Section PAPER (Special Section on Low-Power LSI and Low-Power IP) Category: Digital Keyword: ultralow voltage, high-speed, ED-MOS, multi-V_th CMOS, fully-depleted SOI,
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A High-Speed and Area-Efficient Dual-Rail PLA Using Divided and Interdigitated Column Circuits Hiroaki YAMAOKA Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/06/01 Vol. E87-C No. 6 ; pp. 1069-1077 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: PLA, high-speed, area-efficient, dual-rail,
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A 1.5 V, 200 MHz, 400 MIPS, 188 µA/MHz and 1.2 V, 300 MHz, 600 MIPS, 169 µA/MHz Digital Signal Processor Core for 3G Wireless Applications Hiroshi TAKAHASHI Shigeshi ABIKO Kenichi TASHIRO Kaoru AWAKA Yutaka TOYONOH Rimon IKENO Shigetoshi MURAMATSU Yasumasa IKEZAKI Tsuyoshi TANAKA Akihiro TAKEGAMA Hiroshi KIMIZUKA Hidehiko NITTA Miki KOJIMA Masaharu SUZUKI James Lowell LARIMER
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/04/01 Vol. E87-C No. 4 ; pp. 491-501 Type of Manuscript: Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies) Category: Keyword: 200 MHz, 300 MHz, 400 MIPS, 600 MIPS, high-speed, low-power, fixed point DSP, 130 nm,
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Signal Integrity Design and Analysis for a 400 MHz RISC Microcontroller Akira YAMADA Yasuhiro NUNOMURA Hiroaki SUZUKI Hisakazu SATO Niichi ITOH Tetsuya KAGEMOTO Hironobu ITO Takashi KURAFUJI Nobuharu YOSHIOKA Jingo NAKANISHI Hiromi NOTANI Rei AKIYAMA Atsushi IWABU Tadao YAMANAKA Hidehiro TAKATA Takeshi SHIBAGAKI Takahiko ARAKAWA Hiroshi MAKINO Osamu TOMISAWA Shuhei IWADE
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2003/04/01 Vol. E86-C No. 4 ; pp. 635-642 Type of Manuscript: Special Section PAPER (Special Issue on High-Performance, Low-Power System LSIs and Related Technologies) Category: Design Methods and Implementation Keyword: microcontroller, high-speed, signal integrity, IR drop, design technique,
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Cell-based Schedulers with Dual-rate Grouping Dong WEI Jie YANG Nirwan ANSARI Symeon PAPAVASSILIOU
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2003/02/01 Vol. E86-B No. 2 ; pp. 637-645 Type of Manuscript: Special Section PAPER (Special Issue on Internet Technology III) Category: Packet Transmission Keyword: scheduling, high-speed, service rate, granularity,
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A High-Speed and Low-Power Clock Tree Synthesis by Dynamic Clock Scheduling Keiichi KUROKAWA Takuya YASUI Yoichi MATSUMURA Masahiko TOYONAGA Atsushi TAKAHASHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/12/01 Vol. E85-A No. 12 ; pp. 2746-2755 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Clock Scheduling Keyword: clock scheduling, clock tree synthesis, high-speed, low power,
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A CAD-Compatible SOI-CMOS Gate Array Using 0.35µm Partially-Depleted Transistors Kimio UEDA Koji NII Yoshiki WADA Shigenobu MAEDA Toshiaki IWAMATSU Yasuo YAMAGUCHI Takashi IPPOSHI Shigeto MAEGAWA Koichiro MASHIKO Yasutaka HORIBA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2000/02/25 Vol. E83-C No. 2 ; pp. 205-211 Type of Manuscript: Special Section PAPER (Special Issue on Low-Power High-Speed CMOS LSI Technologies) Category: Keyword: SOI, CMOS, field-shield isolation, gate array, low-power, high-speed,
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A 40-Gb/s 88 ATM Switch LSI Using 0. 25-µmCMOS/SIMOX Yusuke OHTOMO Sadayuki YASUDA Masafumi NOGAWA Jun-ichi INOUE Kimihiro YAMAKOSHI Hirotoshi SAWADA Masayuki INO Shigeki HINO Yasuhiro SATO Yuichiro TAKEI Takumi WATANABE Ken TAKEYA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/05/25 Vol. E81-C No. 5 ; pp. 737-745 Type of Manuscript: Special Section PAPER (Special Issue on Multimedia, Network, and DRAM LSIs) Category: Network Keyword: SOI, CMOS, ATM, high-speed,
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Very-High-Speed and Low Driving-Voltage Modulator Modules for a Short Optical Pulse Generation Koichi WAKITA Kaoru YOSHINO Akira HIRANO Susumu KONDO Yoshio NOGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/02/25 Vol. E81-C No. 2 ; pp. 175-179 Type of Manuscript: Special Section PAPER (Special Issue on Ultrashort Optical Pulse Technologies and their Applications) Category: Keyword: optical pulse generation, modulator module, multiple quantum well, high-speed, 40 GHz,
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A High-Speed Tandem-Crosspoint ATM Switch Architecture with Input and Output Buffers Eiji OKI Naoaki YAMANAKA
Publication: IEICE TRANSACTIONS on Communications Publication Date: 1998/02/25 Vol. E81-B No. 2 ; pp. 215-223 Type of Manuscript: Special Section PAPER (Special Issue on ATM Switching Systems for future B-ISDN) Category: ATM switching architecture Keyword: ATM, switch, high-speed, crosspoint, buffer,
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SOI/CMOS Circuit Design for High-Speed Communication LSIs Kimio UEDA Yoshiki WADA Takanori HIROTA Shigenobu MAEDA Koichiro MASHIKO Hisanori HAMANO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1997/07/25 Vol. E80-C No. 7 ; pp. 886-892 Type of Manuscript: Special Section PAPER (Special Issue on New Concept Device and Novel Architecture LSIs) Category: Novel Structure Devices Keyword: multiplexer, demultiplexer, CMOS device, SOI/CMOS device, low-power, high-speed,
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An Advanced Shallow SIMOX/CMOS Technology for High Performance Portable Systems Alberto O. ADAN Toshio NAKA Seiji KANEKO Daizo URABE Kenichi HIGASHI Yasumori FUKUSHIMA Soshu TAKAMATSU Shogo HIDESHIMA Atsushi KAGISAWA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1997/03/25 Vol. E80-C No. 3 ; pp. 407-416 Type of Manuscript: Special Section PAPER (Special Issue on SOI Devices and Their Process Technologies) Category: Keyword: SOI, SIMOX, CMOS, low-power, high-speed,
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Analysis of the Delay Distributions of 0.5 µm SOI LSIs Toshiaki IWAMATSU Takashi IPPOSHI Yasuo YAMAGUCHI Kimio UEDA Koichiro MASHIKO Shigeto MAEGAWA Yasuo INOUE Tadashi HIRAO Tdashi NISHIMURA Akihiko YASUOKA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1997/03/25 Vol. E80-C No. 3 ; pp. 464-471 Type of Manuscript: Special Section PAPER (Special Issue on SOI Devices and Their Process Technologies) Category: Keyword: SOI, SIMOX, divider, adder, high-speed, low voltage,
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High-Speed Data Transmission Using Millimeter-Wave Fiber-Optic Links Hiroshi KAWAMURA Nobuaki IMAI Eiichi OGAWA Hideyuki INOMATA
Publication: IEICE TRANSACTIONS on Communications Publication Date: 1996/12/25 Vol. E79-B No. 12 ; pp. 1784-1791 Type of Manuscript: Special Section PAPER (Special Issue on Millimeter-wave Short-range Application Systems Technology) Category: Keyword: millimeter-wave, fiber, high-speed, 100 Mbps, microcell,
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VLSI-Oriented Input and Output Buffered Switch Architecture for High-Speed ATM Backbone Nodes Yukio KAMATANI Yoshihiro OHBA Yoshimitsu SHIMOJO Koutarou ISE Masahiko MOTOYAMA Toshitada SAITO
Publication: IEICE TRANSACTIONS on Communications Publication Date: 1996/05/25 Vol. E79-B No. 5 ; pp. 647-657 Type of Manuscript: Special Section PAPER (Special Issue on High Speed Local Area Network) Category: Keyword: ATM, switch, node, high-speed, backbone, flow control, input buffer, output buffer, shared buffer, multicast, QoS, LSI,
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A 2.6-Gbps/pin SIMOX-CMOS Low-Voltage-Swing Interface Circuit Yusuke OHTOMO Masafumi NOGAWA Masayuki INO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1996/04/25 Vol. E79-C No. 4 ; pp. 524-529 Type of Manuscript: Special Section PAPER (Special Issue on Ultra-High-Speed LSIs) Category: Keyword: CMOS, interface, high-speed, active-pull-up, SOI,
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Examination of High-Speed, Low-Power-Consumption Thermal Head Susumu SHIBATA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/11/25 Vol. E78-C No. 11 ; pp. 1632-1637 Type of Manuscript: PAPER Category: Recording and Memory Technologies Keyword: high-speed, low-power-consumption, thermal head, heat insulation layer, heating resistor, thermal conductivity, heat characteristic, glass, polyimide,
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Passive Sonar-Ranging System Based on Adaptive Filter Technique Chang-Yu SUN Qi-Hu LI Takashi SOMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1995/05/25 Vol. E78-A No. 5 ; pp. 594-599 Type of Manuscript: PAPER Category: Digital Signal Processing Keyword: passive sonar-ranging, adaptive filtering technique, time-delay, high-speed, high accuracy,
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Dynamic Terminations for Low-Power High-Speed Chip Interconnection in Portable Equipment Takayuki KAWAHARA Masakazu AOKI Katsutaka KIMURA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/04/25 Vol. E78-C No. 4 ; pp. 404-413 Type of Manuscript: Special Section PAPER (Special Issue on Low-Voltage, Low-Power Integrated Circuits) Category: Digital Circuits Keyword: dynamic termination, transmission line, low-power, high-speed,
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High-Speed and Low-Power n⁺-p⁺ Double-Gate SOI CMOS Kunihiro SUZUKI Tetsu TANAKA Yoshiharu TOSAKA Hiroshi HORIE Toshihiro SUGII
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/04/25 Vol. E78-C No. 4 ; pp. 360-367 Type of Manuscript: Special Section PAPER (Special Issue on Low-Voltage, Low-Power Integrated Circuits) Category: Device Technology Keyword: MOSFET, SOI, double-gate, high-speed, low-power, threshold voltage,
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Lateral Scaling Investigation on DC and RF Performances of InP/InGaAs Heterojunction Bipolar Transistors Hiroki NAKAJIMA Kenji KURISHIMA Shoji YAMAHATA Takashi KOBAYASHI Yutaka MATSUOKA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/02/25 Vol. E78-C No. 2 ; pp. 186-192 Type of Manuscript: PAPER Category: Semiconductor Materials and Devices Keyword: InP, InGaAs, HBT, high-speed, low-power,
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A High-Speed ATM Switching Architecture Using Small Shared Switch Blocks Ken-ichi ENDO Naoaki YAMANAKA
Publication: IEICE TRANSACTIONS on Communications Publication Date: 1993/07/25 Vol. E76-B No. 7 ; pp. 736-740 Type of Manuscript: Special Section LETTER (Special Section of Letters Selected from the 1992 IEICE Fall Conference and the 1993 IEICE Spring Conference) Category: Keyword: ATM, B-ISDN, ring arbitrator, contention control, matrix switch, high-speed,
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