Keyword : high-resolution DAC


The Design of a 2.7 V, 200 MS/s, and 14-Bit CMOS D/A Converter with 63 dB of SFDR Characteristics for the 90 MHz Output Signal
Hiroki SAKURAI Yasuhiro SUGIMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/06/01
Vol. E86-C  No. 6 ; pp. 1077-1084
Type of Manuscript:  Special Section PAPER (Special Issue on Devices and Circuits for Next Generation Multi-Media Communication Systems)
Category: 
Keyword: 
high-speed DAClow-voltage DAChigh-resolution DACCMOS DACSFDR characteristics
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