IEICE Trans

Keyword : high throughput

Energy-Efficient KBP: Kernel Enhancements for Low-Latency and Energy-Efficient Networking Kei FUJIMOTO Ko NATORI Masashi KANEKO Akinori SHIRAGA
Publication: Publication Date: 2022/09/01 Vol. E105-B No. 9 ; pp. 1039-1052 Type of Manuscript: PAPER Category: Network Keyword: low latency, energy efficient, high throughput, network, kernel, virtual machine,
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KBP: Kernel Enhancements for Low-Latency Networking for Virtual Machine and Container without Application Customization Kei FUJIMOTO Masashi KANEKO Kenichi MATSUI Masayuki AKUTSU
Publication: Publication Date: 2022/05/01 Vol. E105-B No. 5 ; pp. 522-532 Type of Manuscript: PAPER Category: Network Keyword: low latency, high throughput, network, kernel, virtual machine, container,
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The ASIC Implementation of SM3 Hash Algorithm for High Throughput Xiaojing DU Shuguo LI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2016/07/01 Vol. E99-A No. 7 ; pp. 1481-1487 Type of Manuscript: LETTER Category: Cryptography and Information Security Keyword: SM3, hash algorithm, ASIC implementation, high throughput,
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Hardware Efficient and Low Latency Implementations of Look-Ahead ACS Computation for Viterbi Decoders Kazuhito ITO Ryoto SHIRASAKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2013/12/01 Vol. E96-A No. 12 ; pp. 2680-2688 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: High-Level Synthesis and System-Level Design Keyword: Viterbi decoding, convolutional code, look-ahead computation, high throughput,
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A Proposition of 600 Mbps WLAN-Like System with Low-Complexity MIMO Decoder for FPGA Implementation Wahyul Amien SYAFEI Yuhei NAGAO Ryuta IMASHIOYA Masayuki KUROSAKI Baiko SAI Hiroshi OCHI
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2011/02/01 Vol. E94-B No. 2 ; pp. 491-498 Type of Manuscript: PAPER Category: Wireless Communication Technologies Keyword: FPGA, GLST, high throughput, MIMO, RTL design, WLAN,
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A Low Power and High Throughput Self Synchronous FPGA Using 65 nm CMOS with Throughput Optimization by Pipeline Alignment Benjamin STEFAN DEVLIN Toru NAKURA Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/07/01 Vol. E93-A No. 7 ; pp. 1319-1328 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: self synchronous, fpga, pipeline alignment, low power, high throughput, dynamic logic, dual pipeline,
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VLSI Architecture for the Low-Computation Cycle and Power-Efficient Recursive DFT/IDFT Design Lan-Da VAN Chin-Teng LIN Yuan-Chu YU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/08/01 Vol. E90-A No. 8 ; pp. 1644-1652 Type of Manuscript: PAPER Category: Digital Signal Processing Keyword: channel density, high density voice over packet, high throughput, low-computation cycle, power efficiency, recursive DFT/IDFT,
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A Study on Rate-Based Multi-Path Transmission Control Protocol (R-M/TCP) Using Packet Scheduling Algorithm Kultida ROJVIBOONCHAI Toru OSUGA Hitoshi AIDA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2006/01/01 Vol. E89-D No. 1 ; pp. 124-131 Type of Manuscript: Special Section PAPER (Special Section on New Technologies and their Applications of the Internet III) Category: TCP Protocol Keyword: multi-path data transfer, TCP, high throughput, high reliability, rate-based protocol,
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