Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2009/04/01 Vol. E92-CNo. 4 ;
pp. 433-443 Type of Manuscript: Special Section PAPER (Special Section on Low-Leakage, Low-Voltage, Low-Power and High-Speed Technologies for System LSIs in Deep-Submicron Era) Category: Keyword: low power, variable line-size, on-chip DRAM, high bandwidth, embedded systems,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/03/01 Vol. E89-CNo. 3 ;
pp. 320-326 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era) Category: Interface and Interconnect Techniques Keyword: inductive coupling, wireless superconnect, 3D-stacked chips, low power, high bandwidth,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2000/11/25 Vol. E83-CNo. 11 ;
pp. 1716-1723 Type of Manuscript: Special Section PAPER (Special Issue on Low-power LSIs and Technologies) Category: Keyword: cache, low power, variable line-size, merged DRAM/logic LSIs, high bandwidth,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2000/05/25 Vol. E83-DNo. 5 ;
pp. 1048-1057 Type of Manuscript: PAPER Category: Computer System Element Keyword: cache, variable line-size, merged DRAM/logic LSIs, high bandwidth,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2000/02/25 Vol. E83-CNo. 2 ;
pp. 195-204 Type of Manuscript: Special Section PAPER (Special Issue on Low-Power High-Speed CMOS LSI Technologies) Category: Keyword: frame-buffer, embedded-DRAM, 3D, high bandwidth,
