Keyword : hierarchical decomposition


A Hierarchical Global Router for Mscro-Block-Embedded Sea-of-Gates
Mototaka KURIBAYASHI Masaaki YAMADA Takashi MITSUHASHI Nobuyuki GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/10/25
Vol. E76-A  No. 10 ; pp. 1694-1704
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
VLSICADrouterhierarchical decomposition
 Summary | Full Text:PDF

Mixed Mode Circuit Simulation Using Dynamic Partitioning
Masakatsu NISHIGAKI Nobuyuki TANAKA Hideki ASAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/03/25
Vol. E76-A  No. 3 ; pp. 292-298
Type of Manuscript:  Special Section PAPER (Special Section on the 5th Karuizawa Workshop on Circuits and Systems)
Category: 
Keyword: 
circuit simulationmixed mode simulationdynamic partitioninghierarchical decompositionlatency
 Summary | Full Text:PDF

Hierarchical Decomposition and Latency for Circuit Simulation by Direct Method
Masakatsu NISHIGAKI Nobuyuki TANAKA Hideki ASAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1992/03/25
Vol. E75-A  No. 3 ; pp. 347-351
Type of Manuscript:  Special Section LETTER (Special Section on the 4th Karuizawa Workshop on Circuits and Systems)
Category: 
Keyword: 
circuit simulation network tearinghierarchical decompositionlatency
 Summary | Full Text:PDF