Keyword : heterogeneous multiple processor

A Debug System for Heterogeneous Multiple Processors in a Single Chip for Multimedia Communication
Noriyuki MINEGISHI Ken-ichi ASANO Hirokazu SUZUKI Keisuke OKADA Takashi KAN 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/10/01
Vol. E85-D  No. 10 ; pp. 1571-1578
Type of Manuscript:  Special Section PAPER (Special Issue on Test and Verification of VLSI)
Category: Debugging Multiple Processors
VLSIdebug methodologyheterogeneous multiple processorIEEE 1149.1reducing debug period
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