Keyword : graph layout


Topological Stack-Queue Mixed Layouts of Graphs
Miki MIYAUCHI 
Publication:   
Publication Date: 2020/02/01
Vol. E103-A  No. 2 ; pp. 510-522
Type of Manuscript:  PAPER
Category: Graphs and Networks
Keyword: 
graph layoutnumber of subdivisions of graphsstack layout of graphsqueue layout of graphsstack-queue mixed layout of graphs
 Summary | Full Text:PDF

(d+1,2)-Track Layout of Bipartite Graph Subdivisions
Miki MIYAUCHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/09/01
Vol. E91-A  No. 9 ; pp. 2292-2295
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
graph drawinggraph layoutbipartite graphsubdivisiontracktrack layout
 Summary | Full Text:PDF

Queue Layout of Bipartite Graph Subdivisions
Miki MIYAUCHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/05/01
Vol. E90-A  No. 5 ; pp. 896-899
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
graph drawinggraph layoutbipartite graphsubdivisionqueuequeue layout
 Summary | Full Text:PDF

VLSI Layout of Trees into Grids of Minimum Width
Akira MATSUBAYASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/05/01
Vol. E87-A  No. 5 ; pp. 1059-1069
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
VLSI layoutgraph layoutgraph embeddinggridaspect ratio
 Summary | Full Text:PDF

A Near-Optimum Parallel Algorithm for a Graph Layout Problem
Rong-Long WANG Xin-Shun XU Zheng TANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/02/01
Vol. E87-A  No. 2 ; pp. 495-501
Type of Manuscript:  PAPER
Category: Neural Networks and Bioengineering
Keyword: 
graph layoutcrossing numberNP-complete problemHopfield neural networklearning algorithm
 Summary | Full Text:PDF

On the Complexity of Minimum Congestion Embedding of Acyclic Graphs into Ladders
Akira MATSUBAYASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/05/01
Vol. E84-A  No. 5 ; pp. 1218-1226
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
graph embeddinggraph layoutVLSI layoutgrid
 Summary | Full Text:PDF

The Complexity of Embedding of Acyclic Graphs into Grids with Minimum Congestion
Akira MATSUBAYASHI Masaya YOKOTA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/11/25
Vol. E83-A  No. 11 ; pp. 2390-2394
Type of Manuscript:  LETTER
Category: Graphs and Networks
Keyword: 
graph embeddinggraph layoutVLSI layoutgrid
 Summary | Full Text:PDF

A Linear Time Algorithm for Constructing Proper-Path-Decomposition of Width Two
Akira MATSUBAYASHI Shuichi UENO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/05/25
Vol. E81-A  No. 5 ; pp. 729-737
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
proper-path-decompositionproper-pathwidthpathwidthgraph layout
 Summary | Full Text:PDF