Keyword : graph embedding


A Fully-Connected Ising Model Embedding Method and Its Evaluation for CMOS Annealing Machines
Daisuke OKU Kotaro TERADA Masato HAYASHI Masanao YAMAOKA Shu TANAKA Nozomu TOGAWA 
Publication:   
Publication Date: 2019/09/01
Vol. E102-D  No. 9 ; pp. 1696-1706
Type of Manuscript:  PAPER
Category: Fundamentals of Information Systems
Keyword: 
CMOS annealingIsing modelIsing computinggraph embeddingcombinatorial optimization
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Low-Rank Representation with Graph Constraints for Robust Visual Tracking
Jieyan LIU Ao MA Jingjing LI Ke LU 
Publication:   
Publication Date: 2017/06/01
Vol. E100-D  No. 6 ; pp. 1325-1338
Type of Manuscript:  PAPER
Category: Image Recognition, Computer Vision
Keyword: 
visual trackinglow-rank representationgraph embedding
 Summary | Full Text:PDF(3.1MB)

VLSI Layout of Trees into Grids of Minimum Width
Akira MATSUBAYASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/05/01
Vol. E87-A  No. 5 ; pp. 1059-1069
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
VLSI layoutgraph layoutgraph embeddinggridaspect ratio
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On the Complexity of Minimum Congestion Embedding of Acyclic Graphs into Ladders
Akira MATSUBAYASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/05/01
Vol. E84-A  No. 5 ; pp. 1218-1226
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
graph embeddinggraph layoutVLSI layoutgrid
 Summary | Full Text:PDF(434.3KB)

The Complexity of Embedding of Acyclic Graphs into Grids with Minimum Congestion
Akira MATSUBAYASHI Masaya YOKOTA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/11/25
Vol. E83-A  No. 11 ; pp. 2390-2394
Type of Manuscript:  LETTER
Category: Graphs and Networks
Keyword: 
graph embeddinggraph layoutVLSI layoutgrid
 Summary | Full Text:PDF(250.4KB)

Minimum Congestion Embedding of Complete Binary Trees into Tori
Akira MATSUBAYASHI Ryo TAKASU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/09/25
Vol. E83-A  No. 9 ; pp. 1804-1808
Type of Manuscript:  PAPER
Category: Graphs and Networks
Keyword: 
graph embeddingcongestioncomplete binary treetorus
 Summary | Full Text:PDF(952.7KB)

Ring Embedding in Faulty Star Graphs
Jung-Hwan CHANG Chan-Su SHIN Kyung-Yong CHWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/09/25
Vol. E82-A  No. 9 ; pp. 1953-1964
Type of Manuscript:  PAPER
Category: Graphs and Networks
Keyword: 
graph embeddingfault tolerancestar graphring
 Summary | Full Text:PDF(699.6KB)

On the Complexity of Embedding of Graphs into Grids with Minimum Congestion
Akira MATSUBAYASHI Shuichi UENO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/04/25
Vol. E79-A  No. 4 ; pp. 469-476
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
NP-completenessgraph embeddingcongestiongridVLSI layout
 Summary | Full Text:PDF(652.5KB)