Keyword : general purpose


A Full-Flexibility-Guaranteed Pin-Count Reduction Design for General-Purpose Digital Microfluidic Biochips
Trung Anh DINH Shigeru YAMASHITA Tsung-Yi HO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/02/01
Vol. E99-A  No. 2 ; pp. 570-578
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
digital microfluidic biochipscombinational logicpin-count reductiongeneral purpose
 Summary | Full Text:PDF

PARS Architecture: A Reconfigurable Architecture with Generalized Execution Model--Design and Implementation of Its Prototype Processor
Kazuya TANIGAWA Tetsuo HIRONAKA Akira KOJIMA Noriyoshi YOSHIDA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2003/05/01
Vol. E86-D  No. 5 ; pp. 830-840
Type of Manuscript:  Special Section PAPER (Special Issue on Reconfigurable Computing)
Category: 
Keyword: 
reconfigurable architectureI-PARS execution modelgeneral purposePARS architecturedesign and implementation
 Summary | Full Text:PDF