Keyword : gate-weighted interpolation


A 6 bit, 7 mW, 700 MS/s Subranging ADC Using CDAC and Gate-Weighted Interpolation
Hyunui LEE Yusuke ASADA Masaya MIYAHARA Akira MATSUZAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/02/01
Vol. E96-A  No. 2 ; pp. 422-433
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
analog-to-digital converter (ADC)Capacitor DAC (CDAC)gate-weighted interpolationdigital offset calibration
 Summary | Full Text:PDF