Keyword : gate depletion


Improvement in Retention/Program Time Ratio of Direct Tunneling Memory (DTM) for Low Power SoC Applications
Kouji TSUNODA Akira SATO Hiroko TASHIRO Toshiro NAKANISHI Hitoshi TANAKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/04/01
Vol. E88-C  No. 4 ; pp. 608-613
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power LSI and Low-Power IP)
Category: Memory
Keyword: 
system-on-a-chipembedded RAMdirect tunnelingtunnel oxidegate depletion
 Summary | Full Text:PDF

Characterization of Atom Diffusion in Polycrystalline Si/SiGe/Si Stacked Gate
Hideki MURAKAMI Yoshikazu MORIWAKI Masafumi FUJITAKE Daisuke AZUMA Seiichiro HIGASHI Seiichi MIYAZAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/04/01
Vol. E88-C  No. 4 ; pp. 646-650
Type of Manuscript:  Special Section PAPER (Special Section on Fundamental and Application of Advanced Semiconductor Devices)
Category: Si Devices and Processes
Keyword: 
SiGe gategate depletion
 Summary | Full Text:PDF

Analysis of Boron Penetration and Gate Depletion Using Dual-Gate PMOSFETs for High Performance G-Bit DRAM Design
Norikatsu TAKAURA Ryo NAGAI Hisao ASAKURA Satoru YAMADA Shin'ichiro KIMURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/05/01
Vol. E85-C  No. 5 ; pp. 1138-1145
Type of Manuscript:  Special Section PAPER (Special Issue on Microelectronic Test Structures)
Category: 
Keyword: 
boron penetrationgate depletiondual-gate PMOSFETsVth fluctuationG-bit DRAM
 Summary | Full Text:PDF