Keyword : gate array

Gate Array Using Low-Temperature Poly-Si Thin-Film Transistors
Mutsumi KIMURA Masashi INOUE Tokiyoshi MATSUDA 
Publication:   
Publication Date: 2020/07/01
Vol. E103-C  No. 7 ; pp. 341-344
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
gate array, low-temperature poly-Si (LTPS), thin-film transistor (TFT), 
 Summary | Full Text:PDF
A New High-Density 10T CMOS Gate-Array Base Cell for Two-Port SRAM Applications
Nobutaro SHIBATA Yoshinori GOTOH Takako ISHIHARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/06/01
Vol. E99-C  No. 6 ; pp. 717-726
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
10T type, bitline capacitance, CMOS, gate array, high speed, low power, memory-oriented base cell, shared contact, two-port SRAM, 
 Summary | Full Text:PDF
A CAD-Compatible SOI-CMOS Gate Array Using 0.35µm Partially-Depleted Transistors
Kimio UEDA Koji NII Yoshiki WADA Shigenobu MAEDA Toshiaki IWAMATSU Yasuo YAMAGUCHI Takashi IPPOSHI Shigeto MAEGAWA Koichiro MASHIKO Yasutaka HORIBA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/02/25
Vol. E83-C  No. 2 ; pp. 205-211
Type of Manuscript:  Special Section PAPER (Special Issue on Low-Power High-Speed CMOS LSI Technologies)
Category: 
Keyword: 
SOI, CMOS, field-shield isolation, gate array, low-power, high-speed, 
 Summary | Full Text:PDF
Polarization Independent Semiconductor Optical Amplifier Gate and Its Application in WDM Systems
Toshio ITO Naoto YOSHIMOTO Osamu MITOMI Katsuaki MAGARI Ikuo OGAWA Fumihiro EBISAWA Yasufumi YAMADA Yuji HASUMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/08/25
Vol. E81-C  No. 8 ; pp. 1237-1244
Type of Manuscript:  Special Section PAPER (Special Issue on High-Capacity WDM/TDM Networks)
Category: 
Keyword: 
semiconductor optical amplifier, gate array, spot-size converter, polarization independence, wavelength selector, 
 Summary | Full Text:PDF
Low-Power and High-Speed LSIs Using 0.25-µm CMOS/SIMOX
Masayuki INO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/12/25
Vol. E80-C  No. 12 ; pp. 1532-1538
Type of Manuscript:  INVITED PAPER (Special Issue on Low-Power and High-Speed LSI Technologies)
Category: 
Keyword: 
CMOS, SOI, SIMOX, gate array, ATM switch, 
 Summary | Full Text:PDF
Design of the Basic Cell and Metallized RAM for 0.5 µm CMOS Gate Array
Yoji NISHIO Hideo HARA Masahiro IWAMURA Yasuo KAMINAGA Katsunori KOIKE Kosaku HIROSE Takayuki NOTO Satoshi OGUCHI Yoshihiko YAMAMOTO Takeshi ONO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/09/25
Vol. E78-C  No. 9 ; pp. 1255-1262
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
gate array, basic cell, compiled RAM, metallized RAM, 
 Summary | Full Text:PDF
A 1-K ECL Gate Array Implemented with Fully Self-Aligned AlGaAs/GaAs Heterojunction Bipolar Transistors
Nobuyuki HAYAMA Yuzuru TOMONOH Hideki TAKAHASHI Kazuhiko HONJO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/10/25
Vol. E75-C  No. 10 ; pp. 1121-1126
Type of Manuscript:  Special Section PAPER (Special Issue on Compound Semiconductor Integrated Circuits)
Category: 
Keyword: 
HBT, gate array, ring oscillator, propagation delay time, 
 Summary | Full Text:PDF
A VLSI Processor Architecture for a Back-Propagation Accelerator
Yoshio HIROSE Hideaki ANBUTSU Koichi YAMASHITA Gensuke GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/10/25
Vol. E75-C  No. 10 ; pp. 1223-1231
Type of Manuscript:  Special Section PAPER (Special Issue on Microprocessors)
Category: Application Specific Processors
Keyword: 
back-propagation, gate array, neural network, pipeline, processor, 
 Summary | Full Text:PDF